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Makefile
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9617c8d49a
FSL DDR: Convert MPC8540ADS to new DDR code.
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16 years ago |
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config.mk
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c2d943ffbf
Move the MPC8540 ADS board under board/freescale.
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17 years ago |
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ddr.c
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b4983e16d1
fsl-ddr: use the 1T timing as default configuration
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16 years ago |
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law.c
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a6e04c344a
85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards
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16 years ago |
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mpc8540ads.c
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a5d212a263
mpc8xxx: LCRR[CLKDIV] is sometimes five bits
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16 years ago |
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tlb.c
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5af0fdd81c
85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards
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16 years ago |
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u-boot.lds
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f62fb99941
Fix all linker script to handle all rodata sections
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16 years ago |
Trent Piepho
f62fb99941
Fix all linker script to handle all rodata sections