ocrtc.c 2.6 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include "ocrtc.h"
  25. #include <asm/processor.h>
  26. #include <i2c.h>
  27. #include <command.h>
  28. extern void lxt971_no_sleep(void);
  29. int board_early_init_f (void)
  30. {
  31. /*
  32. * IRQ 0-15 405GP internally generated; active high; level sensitive
  33. * IRQ 16 405GP internally generated; active low; level sensitive
  34. * IRQ 17-24 RESERVED
  35. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  36. * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
  37. * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
  38. * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
  39. * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
  40. * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
  41. * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  42. */
  43. mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
  44. mtdcr (uicer, 0x00000000); /* disable all ints */
  45. mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
  46. mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
  47. mtdcr (uictr, 0x10000000); /* set int trigger levels */
  48. mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
  49. mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
  50. /*
  51. * EBC Configuration Register: clear EBTC -> high-Z ebc signals between
  52. * transfers, set device-paced timeout to 256 cycles
  53. */
  54. mtebc (epcr, 0x20400000);
  55. return 0;
  56. }
  57. /*
  58. * Check Board Identity:
  59. */
  60. int checkboard (void)
  61. {
  62. char str[64];
  63. int i = getenv_r ("serial#", str, sizeof (str));
  64. puts ("Board: ");
  65. if (i == -1) {
  66. #ifdef CONFIG_OCRTC
  67. puts ("### No HW ID - assuming OCRTC");
  68. #endif
  69. #ifdef CONFIG_ORSG
  70. puts ("### No HW ID - assuming ORSG");
  71. #endif
  72. } else {
  73. puts (str);
  74. }
  75. putc ('\n');
  76. /*
  77. * Disable sleep mode in LXT971
  78. */
  79. lxt971_no_sleep();
  80. return (0);
  81. }