ar405.c 10 KB

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  1. /*
  2. * (C) Copyright 2001-2004
  3. * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include "ar405.h"
  25. #include <asm/processor.h>
  26. #include <asm/io.h>
  27. #include <command.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /*cmd_boot.c*/
  30. extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  31. extern void lxt971_no_sleep(void);
  32. /* ------------------------------------------------------------------------- */
  33. #if 0
  34. #define FPGA_DEBUG
  35. #endif
  36. /* fpga configuration data - generated by bin2cc */
  37. const unsigned char fpgadata[] = {
  38. #include "fpgadata.c"
  39. };
  40. const unsigned char fpgadata_xl30[] = {
  41. #include "fpgadata_xl30.c"
  42. };
  43. /*
  44. * include common fpga code (for esd boards)
  45. */
  46. #include "../common/fpga.c"
  47. int board_early_init_f (void)
  48. {
  49. int index, len, i;
  50. int status;
  51. #ifdef FPGA_DEBUG
  52. /* set up serial port with default baudrate */
  53. (void) get_clocks ();
  54. gd->baudrate = CONFIG_BAUDRATE;
  55. serial_init ();
  56. console_init_f ();
  57. #endif
  58. /*
  59. * Boot onboard FPGA
  60. */
  61. /* first try 40er image */
  62. gd->board_type = 40;
  63. status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
  64. if (status != 0) {
  65. /* try xl30er image */
  66. gd->board_type = 30;
  67. status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
  68. if (status != 0) {
  69. /* booting FPGA failed */
  70. #ifndef FPGA_DEBUG
  71. /* set up serial port with default baudrate */
  72. (void) get_clocks ();
  73. gd->baudrate = CONFIG_BAUDRATE;
  74. serial_init ();
  75. console_init_f ();
  76. #endif
  77. printf ("\nFPGA: Booting failed ");
  78. switch (status) {
  79. case ERROR_FPGA_PRG_INIT_LOW:
  80. printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  81. break;
  82. case ERROR_FPGA_PRG_INIT_HIGH:
  83. printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  84. break;
  85. case ERROR_FPGA_PRG_DONE:
  86. printf ("(Timeout: DONE not high after programming FPGA)\n ");
  87. break;
  88. }
  89. /* display infos on fpgaimage */
  90. index = 15;
  91. for (i = 0; i < 4; i++) {
  92. len = fpgadata[index];
  93. printf ("FPGA: %s\n", &(fpgadata[index + 1]));
  94. index += len + 3;
  95. }
  96. putc ('\n');
  97. /* delayed reboot */
  98. for (i = 20; i > 0; i--) {
  99. printf ("Rebooting in %2d seconds \r", i);
  100. for (index = 0; index < 1000; index++)
  101. udelay (1000);
  102. }
  103. putc ('\n');
  104. do_reset (NULL, 0, 0, NULL);
  105. }
  106. }
  107. /*
  108. * IRQ 0-15 405GP internally generated; active high; level sensitive
  109. * IRQ 16 405GP internally generated; active low; level sensitive
  110. * IRQ 17-24 RESERVED
  111. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  112. * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
  113. * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
  114. * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
  115. * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
  116. * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
  117. * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  118. */
  119. mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
  120. mtdcr (uicer, 0x00000000); /* disable all ints */
  121. mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
  122. mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
  123. mtdcr (uictr, 0x10000000); /* set int trigger levels */
  124. mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
  125. mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
  126. out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */
  127. return 0;
  128. }
  129. /*
  130. * Check Board Identity:
  131. */
  132. int checkboard (void)
  133. {
  134. int index;
  135. int len;
  136. char str[64];
  137. int i = getenv_r ("serial#", str, sizeof (str));
  138. const unsigned char *fpga;
  139. puts ("Board: ");
  140. if (i == -1) {
  141. puts ("### No HW ID - assuming AR405");
  142. } else {
  143. puts(str);
  144. }
  145. puts ("\nFPGA: ");
  146. /* display infos on fpgaimage */
  147. if (gd->board_type == 30) {
  148. fpga = fpgadata_xl30;
  149. } else {
  150. fpga = fpgadata;
  151. }
  152. index = 15;
  153. for (i = 0; i < 4; i++) {
  154. len = fpga[index];
  155. printf ("%s ", &(fpga[index + 1]));
  156. index += len + 3;
  157. }
  158. putc ('\n');
  159. /*
  160. * Disable sleep mode in LXT971
  161. */
  162. lxt971_no_sleep();
  163. return 0;
  164. }
  165. #if 1 /* test-only: some internal test routines... */
  166. #define DIGEN ((void *)0xf03000b4) /* u8 */
  167. #define DIGOUT ((void *)0xf03000b0) /* u16 */
  168. #define DIGIN ((void *)0xf03000a0) /* u16 */
  169. /*
  170. * Some test routines
  171. */
  172. int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  173. {
  174. int i;
  175. int k;
  176. int start;
  177. int end;
  178. if (argc != 3) {
  179. puts("Usage: digtest n_start n_end (digtest 0 7)\n");
  180. return 0;
  181. }
  182. start = simple_strtol (argv[1], NULL, 10);
  183. end = simple_strtol (argv[2], NULL, 10);
  184. /*
  185. * Enable digital outputs
  186. */
  187. out_8(DIGEN, 0x08);
  188. printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
  189. start, end);
  190. /*
  191. * Set outputs one by one
  192. */
  193. for (;;) {
  194. for (i=start; i<=end; i++) {
  195. out_be16(DIGOUT, 0x0001 << i);
  196. for (k=0; k<200; k++)
  197. udelay(1000);
  198. if (in_be16(DIGIN) != (0x0001 << i)) {
  199. printf("ERROR: OUT=0x%04X, IN=0x%04X\n",
  200. 0x0001 << i, in_be16(DIGIN));
  201. return 0;
  202. }
  203. /* Abort if ctrl-c was pressed */
  204. if (ctrlc()) {
  205. puts("\nAbort\n");
  206. return 0;
  207. }
  208. }
  209. }
  210. return 0;
  211. }
  212. U_BOOT_CMD(
  213. digtest, 3, 1, do_digtest,
  214. "Test digital in-/output",
  215. NULL
  216. );
  217. #define ERROR_DELTA 256
  218. struct io {
  219. short val;
  220. short dummy;
  221. };
  222. int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  223. {
  224. short val;
  225. int i;
  226. int volt;
  227. struct io *out;
  228. struct io *in;
  229. out = (struct io *)0xf0300090;
  230. in = (struct io *)0xf0300000;
  231. i = simple_strtol (argv[1], NULL, 10);
  232. volt = 0;
  233. printf("Setting Channel %d to %dV...\n", i, volt);
  234. out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
  235. udelay(10000);
  236. val = in_be16((void *)&(in[i*2].val));
  237. printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
  238. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  239. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  240. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  241. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  242. return -1;
  243. }
  244. val = in_be16((void *)&(in[i*2+1].val));
  245. printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
  246. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  247. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  248. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  249. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  250. return -1;
  251. }
  252. volt = 5;
  253. printf("Setting Channel %d to %dV...\n", i, volt);
  254. out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
  255. udelay(10000);
  256. val = in_be16((void *)&(in[i*2].val));
  257. printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
  258. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  259. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  260. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  261. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  262. return -1;
  263. }
  264. val = in_be16((void *)&(in[i*2+1].val));
  265. printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
  266. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  267. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  268. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  269. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  270. return -1;
  271. }
  272. volt = 10;
  273. printf("Setting Channel %d to %dV...\n", i, volt);
  274. out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
  275. udelay(10000);
  276. val = in_be16((void *)&(in[i*2].val));
  277. printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
  278. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  279. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  280. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  281. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  282. return -1;
  283. }
  284. val = in_be16((void *)&(in[i*2+1].val));
  285. printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
  286. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  287. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  288. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  289. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  290. return -1;
  291. }
  292. printf("Channel %d OK!\n", i);
  293. return 0;
  294. }
  295. U_BOOT_CMD(
  296. anatest, 2, 1, do_anatest,
  297. "Test analog in-/output",
  298. NULL
  299. );
  300. int counter = 0;
  301. void cyclicInt(void *ptr)
  302. {
  303. out_be16((void *)0xf03000e8, 0x0800); /* ack int */
  304. counter++;
  305. }
  306. int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  307. {
  308. ulong *incin;
  309. int i;
  310. incin = (ulong *)0xf0300040;
  311. /*
  312. * Clear inc counter
  313. */
  314. out_be32((void *)&incin[0], 0);
  315. out_be32((void *)&incin[1], 0);
  316. out_be32((void *)&incin[2], 0);
  317. out_be32((void *)&incin[3], 0);
  318. incin = (ulong *)0xf0300050;
  319. /*
  320. * Inc a little
  321. */
  322. for (i=0; i<10000; i++) {
  323. switch (i & 0x03) {
  324. case 0:
  325. out_8(DIGEN, 0x02);
  326. break;
  327. case 1:
  328. out_8(DIGEN, 0x03);
  329. break;
  330. case 2:
  331. out_8(DIGEN, 0x01);
  332. break;
  333. case 3:
  334. out_8(DIGEN, 0x00);
  335. break;
  336. }
  337. udelay(10);
  338. }
  339. printf("Inc 0 = %d\n", in_be32((void *)&incin[0]));
  340. printf("Inc 1 = %d\n", in_be32((void *)&incin[1]));
  341. printf("Inc 2 = %d\n", in_be32((void *)&incin[2]));
  342. printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));
  343. out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */
  344. out_be16((void *)0xf03000ec,
  345. in_be16((void *)0xf03000ec) | 0x0800); /* enable int */
  346. irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
  347. printf("counter=%d\n", counter);
  348. return 0;
  349. }
  350. U_BOOT_CMD(
  351. inctest, 3, 1, do_inctest,
  352. "Test incremental encoder inputs",
  353. NULL
  354. );
  355. #endif