cradle.c 5.8 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <asm/arch/pxa-regs.h>
  28. #include <common.h>
  29. DECLARE_GLOBAL_DATA_PTR;
  30. /* ------------------------------------------------------------------------- */
  31. /* local prototypes */
  32. void set_led (int led, int color);
  33. void error_code_halt (int code);
  34. int init_sio (int led, unsigned long base);
  35. inline void cradle_outb (unsigned short val, unsigned long base,
  36. unsigned long reg);
  37. inline unsigned char cradle_inb (unsigned long base, unsigned long reg);
  38. inline void sleep (int i);
  39. inline void
  40. /**********************************************************/
  41. sleep (int i)
  42. /**********************************************************/
  43. {
  44. while (i--) {
  45. udelay (1000000);
  46. }
  47. }
  48. void
  49. /**********************************************************/
  50. error_code_halt (int code)
  51. /**********************************************************/
  52. {
  53. while (1) {
  54. led_code (code, RED);
  55. sleep (1);
  56. led_code (0, OFF);
  57. sleep (1);
  58. }
  59. }
  60. void
  61. /**********************************************************/
  62. led_code (int code, int color)
  63. /**********************************************************/
  64. {
  65. int i;
  66. code &= 0xf; /* only 4 leds */
  67. for (i = 0; i < 4; i++) {
  68. if (code & (1 << i)) {
  69. set_led (i, color);
  70. } else {
  71. set_led (i, OFF);
  72. }
  73. }
  74. }
  75. void
  76. /**********************************************************/
  77. set_led (int led, int color)
  78. /**********************************************************/
  79. {
  80. int shift = led * 2;
  81. unsigned long mask = 0x3 << shift;
  82. CRADLE_LED_CLR_REG = mask; /* clear bits */
  83. CRADLE_LED_SET_REG = (color << shift); /* set bits */
  84. udelay (5000);
  85. }
  86. inline void
  87. /**********************************************************/
  88. cradle_outb (unsigned short val, unsigned long base, unsigned long reg)
  89. /**********************************************************/
  90. {
  91. *(volatile unsigned short *) (base + (reg * 2)) = val;
  92. }
  93. inline unsigned char
  94. /**********************************************************/
  95. cradle_inb (unsigned long base, unsigned long reg)
  96. /**********************************************************/
  97. {
  98. unsigned short val;
  99. val = *(volatile unsigned short *) (base + (reg * 2));
  100. return (val & 0xff);
  101. }
  102. int
  103. /**********************************************************/
  104. init_sio (int led, unsigned long base)
  105. /**********************************************************/
  106. {
  107. unsigned char val;
  108. set_led (led, YELLOW);
  109. val = cradle_inb (base, CRADLE_SIO_INDEX);
  110. val = cradle_inb (base, CRADLE_SIO_INDEX);
  111. if (val != 0) {
  112. set_led (led, RED);
  113. return -1;
  114. }
  115. /* map SCC2 to COM1 */
  116. cradle_outb (0x01, base, CRADLE_SIO_INDEX);
  117. cradle_outb (0x00, base, CRADLE_SIO_DATA);
  118. /* enable SCC2 extended regs */
  119. cradle_outb (0x40, base, CRADLE_SIO_INDEX);
  120. cradle_outb (0xa0, base, CRADLE_SIO_DATA);
  121. /* enable SCC2 clock multiplier */
  122. cradle_outb (0x51, base, CRADLE_SIO_INDEX);
  123. cradle_outb (0x04, base, CRADLE_SIO_DATA);
  124. /* enable SCC2 */
  125. cradle_outb (0x00, base, CRADLE_SIO_INDEX);
  126. cradle_outb (0x04, base, CRADLE_SIO_DATA);
  127. /* map SCC2 DMA to channel 0 */
  128. cradle_outb (0x4f, base, CRADLE_SIO_INDEX);
  129. cradle_outb (0x09, base, CRADLE_SIO_DATA);
  130. /* read ID from SIO to check operation */
  131. cradle_outb (0xe4, base, 0x3f8 + 0x3);
  132. val = cradle_inb (base, 0x3f8 + 0x0);
  133. if ((val & 0xf0) != 0x20) {
  134. set_led (led, RED);
  135. /* disable SCC2 */
  136. cradle_outb (0, base, CRADLE_SIO_INDEX);
  137. cradle_outb (0, base, CRADLE_SIO_DATA);
  138. return -1;
  139. }
  140. /* set back to bank 0 */
  141. cradle_outb (0, base, 0x3f8 + 0x3);
  142. set_led (led, GREEN);
  143. return 0;
  144. }
  145. /*
  146. * Miscelaneous platform dependent initialisations
  147. */
  148. int
  149. /**********************************************************/
  150. board_late_init (void)
  151. /**********************************************************/
  152. {
  153. return (0);
  154. }
  155. int
  156. /**********************************************************/
  157. board_init (void)
  158. /**********************************************************/
  159. {
  160. led_code (0xf, YELLOW);
  161. /* arch number of HHP Cradle */
  162. gd->bd->bi_arch_number = MACH_TYPE_HHP_CRADLE;
  163. /* adress of boot parameters */
  164. gd->bd->bi_boot_params = 0xa0000100;
  165. /* Init SIOs to enable SCC2 */
  166. udelay (100000); /* delay makes it look neat */
  167. init_sio (0, CRADLE_SIO1_PHYS);
  168. udelay (100000);
  169. init_sio (1, CRADLE_SIO2_PHYS);
  170. udelay (100000);
  171. init_sio (2, CRADLE_SIO3_PHYS);
  172. udelay (100000);
  173. set_led (3, GREEN);
  174. return 1;
  175. }
  176. int
  177. /**********************************************************/
  178. dram_init (void)
  179. /**********************************************************/
  180. {
  181. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  182. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  183. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  184. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  185. gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
  186. gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
  187. gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
  188. gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
  189. return (PHYS_SDRAM_1_SIZE +
  190. PHYS_SDRAM_2_SIZE +
  191. PHYS_SDRAM_3_SIZE +
  192. PHYS_SDRAM_4_SIZE );
  193. }