law.c 2.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061
  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2000
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <asm/fsl_law.h>
  27. #include <asm/mmu.h>
  28. /*
  29. * LAW(Local Access Window) configuration:
  30. *
  31. * 0x0000_0000 0x7fff_ffff DDR 2G
  32. * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
  33. * 0xa000_0000 0xbfff_ffff PCIe MEM 512M
  34. * 0xc000_0000 0xdfff_ffff PCI2 MEM 512M
  35. * 0xe000_0000 0xe000_ffff CCSR 1M
  36. * 0xe200_0000 0xe10f_ffff PCI1 IO 1M
  37. * 0xe280_0000 0xe20f_ffff PCI2 IO 1M
  38. * 0xe300_0000 0xe30f_ffff PCIe IO 1M
  39. * 0xf800_0000 0xffff_ffff FLASH (boot bank) 128M
  40. *
  41. * Notes:
  42. * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
  43. * If flash is 8M at default position (last 8M), no LAW needed.
  44. *
  45. * LAW 0 is reserved for boot mapping
  46. */
  47. struct law_entry law_table[] = {
  48. SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
  49. SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_1M, LAW_TRGT_IF_PCI_1),
  50. SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
  51. SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2),
  52. SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
  53. SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1),
  54. /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
  55. SET_LAW(CONFIG_SYS_LBC_CACHE_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
  56. };
  57. int num_law_entries = ARRAY_SIZE(law_table);