setup.S 3.0 KB

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  1. /*
  2. * Memory Setup stuff - taken from blob memsetup.S
  3. *
  4. * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
  5. * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
  6. * 2004 (c) MontaVista Software, Inc.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include "config.h"
  27. #include "version.h"
  28. /*-----------------------------------------------------------------------
  29. * Board defines:
  30. */
  31. #define MDCNFG 0x00
  32. #define MDCAS00 0x04
  33. #define MDCAS01 0x08
  34. #define MDCAS02 0x0C
  35. #define MSC0 0x10
  36. #define MSC1 0x14
  37. #define MECR 0x18
  38. #define MDREFR 0x1C
  39. #define MDCAS20 0x20
  40. #define MDCAS21 0x24
  41. #define MDCAS22 0x28
  42. #define MSC2 0x2C
  43. #define SMCNFG 0x30
  44. #define ASSABET_BCR (0x12000000)
  45. #define ASSABET_BCR_DB1110 (0x00a07490 | (0<<16) | (0<<17))
  46. #define ASSABET_SCR_nNEPONSET (1 << 9)
  47. #define NEPONSET_LEDS (0x10000010)
  48. /*-----------------------------------------------------------------------
  49. * Setup parameters for the board:
  50. */
  51. MEM_BASE: .long 0xa0000000
  52. MEM_START: .long 0xc0000000
  53. mdcnfg: .long 0x72547254
  54. mdcas00: .long 0xaaaaaa7f
  55. mdcas01: .long 0xaaaaaaaa
  56. mdcas02: .long 0xaaaaaaaa
  57. msc0: .long 0x4b384370
  58. msc1: .long 0x22212419
  59. mecr: .long 0x994a994a
  60. mdrefr: .long 0x04340327
  61. mdcas20: .long 0xaaaaaa7f
  62. mdcas21: .long 0xaaaaaaaa
  63. mdcas22: .long 0xaaaaaaaa
  64. msc2: .long 0x42196669
  65. smcnfg: .long 0x00000000
  66. BCR: .long ASSABET_BCR
  67. BCR_DB1110: .long ASSABET_BCR_DB1110
  68. LEDS: .long NEPONSET_LEDS
  69. .globl lowlevel_init
  70. lowlevel_init:
  71. /* Setting up the memory and stuff */
  72. ldr r0, MEM_BASE
  73. ldr r1, mdcas00
  74. str r1, [r0, #MDCAS00]
  75. ldr r1, mdcas01
  76. str r1, [r0, #MDCAS01]
  77. ldr r1, mdcas02
  78. str r1, [r0, #MDCAS02]
  79. ldr r1, mdcas20
  80. str r1, [r0, #MDCAS20]
  81. ldr r1, mdcas21
  82. str r1, [r0, #MDCAS21]
  83. ldr r1, mdcas22
  84. str r1, [r0, #MDCAS22]
  85. ldr r1, mdrefr
  86. str r1, [r0, #MDREFR]
  87. ldr r1, mecr
  88. str r1, [r0, #MECR]
  89. ldr r1, msc0
  90. str r1, [r0, #MSC0]
  91. ldr r1, msc1
  92. str r1, [r0, #MSC1]
  93. ldr r1, msc2
  94. str r1, [r0, #MSC2]
  95. ldr r1, smcnfg
  96. str r1, [r0, #SMCNFG]
  97. ldr r1, mdcnfg
  98. str r1, [r0, #MDCNFG]
  99. /* Load something to activate bank */
  100. ldr r2, MEM_START
  101. .rept 8
  102. ldr r3, [r2]
  103. .endr
  104. /* Enable SDRAM */
  105. orr r1, r1, #0x00000001
  106. str r1, [r0, #MDCNFG]
  107. ldr r1, BCR
  108. ldr r2, BCR_DB1110
  109. str r2, [r1]
  110. ldr r1, LEDS
  111. mov r0, #0x3
  112. str r0, [r1]
  113. /* All done... */
  114. mov pc, lr