at91sam9_wdt.c 2.1 KB

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  1. /*
  2. * [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c]
  3. *
  4. * Watchdog driver for Atmel AT91SAM9x processors.
  5. *
  6. * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  7. * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * The Watchdog Timer Mode Register can be only written to once. If the
  16. * timeout need to be set from U-Boot, be sure that the bootstrap doesn't
  17. * write to this register. Inform Linux to it too
  18. */
  19. #include <common.h>
  20. #include <watchdog.h>
  21. #include <asm/arch/hardware.h>
  22. #include <asm/arch/io.h>
  23. #include <asm/arch/at91_wdt.h>
  24. /*
  25. * AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
  26. * use this to convert a watchdog
  27. * value from/to milliseconds.
  28. */
  29. #define ms_to_ticks(t) (((t << 8) / 1000) - 1)
  30. #define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
  31. /* Hardware timeout in seconds */
  32. #define WDT_HW_TIMEOUT 2
  33. /*
  34. * Set the watchdog time interval in 1/256Hz (write-once)
  35. * Counter is 12 bit.
  36. */
  37. static int at91_wdt_settimeout(unsigned int timeout)
  38. {
  39. unsigned int reg;
  40. unsigned int mr;
  41. /* Check if disabled */
  42. mr = at91_sys_read(AT91_WDT_MR);
  43. if (mr & AT91_WDT_WDDIS) {
  44. printf("sorry, watchdog is disabled\n");
  45. return -1;
  46. }
  47. /*
  48. * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
  49. *
  50. * Since WDV is a 12-bit counter, the maximum period is
  51. * 4096 / 256 = 16 seconds.
  52. */
  53. reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
  54. /* | AT91_WDT_WDRPROC causes processor reset only */
  55. | AT91_WDT_WDDBGHLT /* disabled in debug mode */
  56. | AT91_WDT_WDD /* restart at any time */
  57. | (timeout & AT91_WDT_WDV); /* timer value */
  58. at91_sys_write(AT91_WDT_MR, reg);
  59. return 0;
  60. }
  61. void hw_watchdog_reset(void)
  62. {
  63. at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  64. }
  65. void hw_watchdog_init(void)
  66. {
  67. /* 16 seconds timer, resets enabled */
  68. at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
  69. }