M5272C3.h 5.4 KB

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  1. /*
  2. * Configuation settings for the Motorola MC5272C3 board.
  3. *
  4. * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. /*
  25. * board/config.h - configuration options, board specific
  26. */
  27. #ifndef _M5272C3_H
  28. #define _M5272C3_H
  29. /*
  30. * High Level Configuration Options
  31. * (easy to change)
  32. */
  33. #define CONFIG_MCF52x2 /* define processor family */
  34. #define CONFIG_M5272 /* define processor type */
  35. #define FEC_ENET
  36. #define CONFIG_BAUDRATE 19200
  37. #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
  38. #define CONFIG_WATCHDOG
  39. #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
  40. #define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
  41. /* Configuration for environment
  42. * Environment is embedded in u-boot in the second sector of the flash
  43. */
  44. #ifndef CONFIG_MONITOR_IS_IN_RAM
  45. #define CFG_ENV_OFFSET 0x4000
  46. #define CFG_ENV_SECT_SIZE 0x2000
  47. #define CFG_ENV_IS_IN_FLASH 1
  48. #define CFG_ENV_IS_EMBEDDED 1
  49. #else
  50. #define CFG_ENV_ADDR 0xffe04000
  51. #define CFG_ENV_SECT_SIZE 0x2000
  52. #define CFG_ENV_IS_IN_FLASH 1
  53. #endif
  54. /*
  55. * Command line configuration.
  56. */
  57. #include <config_cmd_default.h>
  58. #define CONFIG_CMD_MII
  59. #undef CONFIG_CMD_LOADS
  60. #undef CONFIG_CMD_LOADB
  61. #define CONFIG_BOOTDELAY 5
  62. #define CFG_PROMPT "-> "
  63. #define CFG_LONGHELP /* undef to save memory */
  64. #if defined(CONFIG_CMD_KGDB)
  65. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  66. #else
  67. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  68. #endif
  69. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  70. #define CFG_MAXARGS 16 /* max number of command args */
  71. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  72. #define CFG_LOAD_ADDR 0x20000
  73. #define CFG_MEMTEST_START 0x400
  74. #define CFG_MEMTEST_END 0x380000
  75. #define CFG_HZ 1000
  76. #define CFG_CLK 66000000
  77. /*
  78. * Low Level Configuration Settings
  79. * (address mappings, register initial values, etc.)
  80. * You should know what you are doing if you make changes here.
  81. */
  82. #define CFG_MBAR 0x10000000 /* Register Base Addrs */
  83. #define CFG_SCR 0x0003;
  84. #define CFG_SPR 0xffff;
  85. #define CFG_DISCOVER_PHY
  86. #define CFG_ENET_BD_BASE 0x380000
  87. /*-----------------------------------------------------------------------
  88. * Definitions for initial stack pointer and data area (in DPRAM)
  89. */
  90. #define CFG_INIT_RAM_ADDR 0x20000000
  91. #define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
  92. #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
  93. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  94. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  95. /*-----------------------------------------------------------------------
  96. * Start addresses for the final memory configuration
  97. * (Set up by the startup code)
  98. * Please note that CFG_SDRAM_BASE _must_ start at 0
  99. */
  100. #define CFG_SDRAM_BASE 0x00000000
  101. #define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
  102. #define CFG_FLASH_BASE 0xffe00000
  103. #ifdef CONFIG_MONITOR_IS_IN_RAM
  104. #define CFG_MONITOR_BASE 0x20000
  105. #else
  106. #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
  107. #endif
  108. #define CFG_MONITOR_LEN 0x20000
  109. #define CFG_MALLOC_LEN (256 << 10)
  110. #define CFG_BOOTPARAMS_LEN 64*1024
  111. /*
  112. * For booting Linux, the board info and command line data
  113. * have to be in the first 8 MB of memory, since this is
  114. * the maximum mapped by the Linux kernel during initialization ??
  115. */
  116. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  117. /*-----------------------------------------------------------------------
  118. * FLASH organization
  119. */
  120. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  121. #define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
  122. #define CFG_FLASH_ERASE_TOUT 1000
  123. /*-----------------------------------------------------------------------
  124. * Cache Configuration
  125. */
  126. #define CFG_CACHELINE_SIZE 16
  127. /*-----------------------------------------------------------------------
  128. * Memory bank definitions
  129. */
  130. #define CFG_BR0_PRELIM 0xFFE00201
  131. #define CFG_OR0_PRELIM 0xFFE00014
  132. #define CFG_BR1_PRELIM 0
  133. #define CFG_OR1_PRELIM 0
  134. #define CFG_BR2_PRELIM 0x30000001
  135. #define CFG_OR2_PRELIM 0xFFF80000
  136. #define CFG_BR3_PRELIM 0
  137. #define CFG_OR3_PRELIM 0
  138. #define CFG_BR4_PRELIM 0
  139. #define CFG_OR4_PRELIM 0
  140. #define CFG_BR5_PRELIM 0
  141. #define CFG_OR5_PRELIM 0
  142. #define CFG_BR6_PRELIM 0
  143. #define CFG_OR6_PRELIM 0
  144. #define CFG_BR7_PRELIM 0x00000701
  145. #define CFG_OR7_PRELIM 0xFFC0007C
  146. /*-----------------------------------------------------------------------
  147. * Port configuration
  148. */
  149. #define CFG_PACNT 0x00000000
  150. #define CFG_PADDR 0x0000
  151. #define CFG_PADAT 0x0000
  152. #define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
  153. #define CFG_PBDDR 0x0000
  154. #define CFG_PBDAT 0x0000
  155. #define CFG_PDCNT 0x00000000
  156. #endif /* _M5272C3_H */