pxa_idp.c 3.3 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2004
  10. * BEC Systems <http://bec-systems.com>
  11. * Cliff Brake <cliff.brake@gmail.com>
  12. * Support for Accelent/Vibren PXA255 IDP
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. */
  32. #include <common.h>
  33. #include <netdev.h>
  34. #include <command.h>
  35. #include <asm/io.h>
  36. #include <asm/arch/pxa.h>
  37. #include <asm/arch/regs-mmc.h>
  38. DECLARE_GLOBAL_DATA_PTR;
  39. /*
  40. * Miscelaneous platform dependent initialisations
  41. */
  42. int board_init (void)
  43. {
  44. /* We have RAM, disable cache */
  45. dcache_disable();
  46. icache_disable();
  47. /* arch number of Lubbock-Board */
  48. gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
  49. /* adress of boot parameters */
  50. gd->bd->bi_boot_params = 0xa0000100;
  51. /* turn on serial ports */
  52. *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
  53. /* set PWM for LCD */
  54. /* a value that works is 60Hz, 77% duty cycle */
  55. writel(readl(CKEN) | CKEN0_PWM0, CKEN);
  56. writel(0x3f, PWM_CTRL0);
  57. writel(0x3ff, PWM_PERVAL0);
  58. writel(792, PWM_PWDUTY0);
  59. /* clear reset to AC97 codec */
  60. writel(readl(CKEN) | CKEN2_AC97, CKEN);
  61. writel(GCR_COLD_RST, GCR);
  62. /* enable LCD backlight */
  63. /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
  64. /* test display */
  65. /* lcd_puts("This is a test\nTest #2\n"); */
  66. return 0;
  67. }
  68. #ifdef CONFIG_CMD_MMC
  69. int board_mmc_init(bd_t *bis)
  70. {
  71. pxa_mmc_register(0);
  72. return 0;
  73. }
  74. #endif
  75. int board_late_init(void)
  76. {
  77. setenv("stdout", "serial");
  78. setenv("stderr", "serial");
  79. return 0;
  80. }
  81. int dram_init(void)
  82. {
  83. pxa2xx_dram_init();
  84. gd->ram_size = PHYS_SDRAM_1_SIZE;
  85. return 0;
  86. }
  87. void dram_init_banksize(void)
  88. {
  89. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  90. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  91. }
  92. #ifdef DEBUG_BLINKC_ENABLE
  93. void delay_c(void)
  94. {
  95. /* reset OSCR to 0 */
  96. writel(0, OSCR);
  97. while (readl(OSCR) > 0x10000)
  98. ;
  99. while (readl(OSCR) < 0xd4000)
  100. ;
  101. }
  102. void blink_c(void)
  103. {
  104. int led_bit = (1<<10);
  105. writel(led_bit, GPDR0);
  106. writel(led_bit, GPCR0);
  107. delay_c();
  108. writel(led_bit, GPSR0);
  109. delay_c();
  110. writel(led_bit, GPCR0);
  111. }
  112. int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  113. {
  114. printf("IDPCMD started\n");
  115. return 0;
  116. }
  117. U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
  118. "custom IDP command",
  119. "no args at this time"
  120. );
  121. #endif
  122. #ifdef CONFIG_CMD_NET
  123. int board_eth_init(bd_t *bis)
  124. {
  125. int rc = 0;
  126. #ifdef CONFIG_SMC91111
  127. rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
  128. #endif
  129. return rc;
  130. }
  131. #endif