mxc_i2c.c 6.4 KB

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  1. /*
  2. * i2c driver for Freescale mx31
  3. *
  4. * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <asm/io.h>
  26. #if defined(CONFIG_HARD_I2C)
  27. #if defined(CONFIG_MX31)
  28. #include <asm/arch/mx31.h>
  29. #include <asm/arch/mx31-regs.h>
  30. #else
  31. #include <asm/arch/imx-regs.h>
  32. #include <asm/arch/clock.h>
  33. #endif
  34. #define IADR 0x00
  35. #define IFDR 0x04
  36. #define I2CR 0x08
  37. #define I2SR 0x0c
  38. #define I2DR 0x10
  39. #define I2CR_IEN (1 << 7)
  40. #define I2CR_IIEN (1 << 6)
  41. #define I2CR_MSTA (1 << 5)
  42. #define I2CR_MTX (1 << 4)
  43. #define I2CR_TX_NO_AK (1 << 3)
  44. #define I2CR_RSTA (1 << 2)
  45. #define I2SR_ICF (1 << 7)
  46. #define I2SR_IBB (1 << 5)
  47. #define I2SR_IIF (1 << 1)
  48. #define I2SR_RX_NO_AK (1 << 0)
  49. #if defined(CONFIG_SYS_I2C_MX31_PORT1)
  50. #define I2C_BASE 0x43f80000
  51. #define I2C_CLK_OFFSET 26
  52. #elif defined (CONFIG_SYS_I2C_MX31_PORT2)
  53. #define I2C_BASE 0x43f98000
  54. #define I2C_CLK_OFFSET 28
  55. #elif defined (CONFIG_SYS_I2C_MX31_PORT3)
  56. #define I2C_BASE 0x43f84000
  57. #define I2C_CLK_OFFSET 30
  58. #elif defined(CONFIG_SYS_I2C_MX53_PORT1)
  59. #define I2C_BASE I2C1_BASE_ADDR
  60. #elif defined(CONFIG_SYS_I2C_MX53_PORT2)
  61. #define I2C_BASE I2C2_BASE_ADDR
  62. #elif defined(CONFIG_SYS_I2C_MX35_PORT1)
  63. #define I2C_BASE I2C_BASE_ADDR
  64. #else
  65. #error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
  66. #endif
  67. #define I2C_MAX_TIMEOUT 10000
  68. #define I2C_MAX_RETRIES 3
  69. static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
  70. 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
  71. 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
  72. static inline void i2c_reset(void)
  73. {
  74. writew(0, I2C_BASE + I2CR); /* Reset module */
  75. writew(0, I2C_BASE + I2SR);
  76. writew(I2CR_IEN, I2C_BASE + I2CR);
  77. }
  78. void i2c_init(int speed, int unused)
  79. {
  80. int freq;
  81. int i;
  82. #if defined(CONFIG_MX31)
  83. struct clock_control_regs *sc_regs =
  84. (struct clock_control_regs *)CCM_BASE;
  85. freq = mx31_get_ipg_clk();
  86. /* start the required I2C clock */
  87. writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
  88. &sc_regs->cgr0);
  89. #else
  90. freq = mxc_get_clock(MXC_IPG_PERCLK);
  91. #endif
  92. for (i = 0; i < 0x1f; i++)
  93. if (freq / div[i] <= speed)
  94. break;
  95. debug("%s: speed: %d\n", __func__, speed);
  96. writew(i, I2C_BASE + IFDR);
  97. i2c_reset();
  98. }
  99. static int wait_idle(void)
  100. {
  101. int timeout = I2C_MAX_TIMEOUT;
  102. while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
  103. writew(0, I2C_BASE + I2SR);
  104. udelay(1);
  105. }
  106. return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
  107. }
  108. static int wait_busy(void)
  109. {
  110. int timeout = I2C_MAX_TIMEOUT;
  111. while (!(readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
  112. udelay(1);
  113. writew(0, I2C_BASE + I2SR); /* clear interrupt */
  114. return timeout;
  115. }
  116. static int wait_complete(void)
  117. {
  118. int timeout = I2C_MAX_TIMEOUT;
  119. while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
  120. writew(0, I2C_BASE + I2SR);
  121. udelay(1);
  122. }
  123. udelay(200);
  124. writew(0, I2C_BASE + I2SR); /* clear interrupt */
  125. return timeout;
  126. }
  127. static int tx_byte(u8 byte)
  128. {
  129. writew(byte, I2C_BASE + I2DR);
  130. if (!wait_complete() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
  131. return -1;
  132. return 0;
  133. }
  134. static int rx_byte(int last)
  135. {
  136. if (!wait_complete())
  137. return -1;
  138. if (last)
  139. writew(I2CR_IEN, I2C_BASE + I2CR);
  140. return readw(I2C_BASE + I2DR);
  141. }
  142. int i2c_probe(uchar chip)
  143. {
  144. int ret;
  145. writew(0, I2C_BASE + I2CR); /* Reset module */
  146. writew(I2CR_IEN, I2C_BASE + I2CR);
  147. writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
  148. ret = tx_byte(chip << 1);
  149. writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR);
  150. return ret;
  151. }
  152. static int i2c_addr(uchar chip, uint addr, int alen)
  153. {
  154. int i, retry = 0;
  155. for (retry = 0; retry < 3; retry++) {
  156. if (wait_idle())
  157. break;
  158. i2c_reset();
  159. for (i = 0; i < I2C_MAX_TIMEOUT; i++)
  160. udelay(1);
  161. }
  162. if (retry >= I2C_MAX_RETRIES) {
  163. debug("%s:bus is busy(%x)\n",
  164. __func__, readw(I2C_BASE + I2SR));
  165. return -1;
  166. }
  167. writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
  168. if (!wait_busy()) {
  169. debug("%s:trigger start fail(%x)\n",
  170. __func__, readw(I2C_BASE + I2SR));
  171. return -1;
  172. }
  173. if (tx_byte(chip << 1) || (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
  174. debug("%s:chip address cycle fail(%x)\n",
  175. __func__, readw(I2C_BASE + I2SR));
  176. return -1;
  177. }
  178. while (alen--)
  179. if (tx_byte((addr >> (alen * 8)) & 0xff) ||
  180. (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
  181. debug("%s:device address cycle fail(%x)\n",
  182. __func__, readw(I2C_BASE + I2SR));
  183. return -1;
  184. }
  185. return 0;
  186. }
  187. int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
  188. {
  189. int timeout = I2C_MAX_TIMEOUT;
  190. int ret;
  191. debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
  192. __func__, chip, addr, alen, len);
  193. if (i2c_addr(chip, addr, alen)) {
  194. printf("i2c_addr failed\n");
  195. return -1;
  196. }
  197. writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR);
  198. if (tx_byte(chip << 1 | 1))
  199. return -1;
  200. writew(I2CR_IEN | I2CR_MSTA |
  201. ((len == 1) ? I2CR_TX_NO_AK : 0),
  202. I2C_BASE + I2CR);
  203. ret = readw(I2C_BASE + I2DR);
  204. while (len--) {
  205. ret = rx_byte(len == 0);
  206. if (ret < 0)
  207. return -1;
  208. *buf++ = ret;
  209. if (len <= 1)
  210. writew(I2CR_IEN | I2CR_MSTA |
  211. I2CR_TX_NO_AK,
  212. I2C_BASE + I2CR);
  213. }
  214. writew(I2CR_IEN, I2C_BASE + I2CR);
  215. while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
  216. udelay(1);
  217. return 0;
  218. }
  219. int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
  220. {
  221. int timeout = I2C_MAX_TIMEOUT;
  222. debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
  223. __func__, chip, addr, alen, len);
  224. if (i2c_addr(chip, addr, alen))
  225. return -1;
  226. while (len--)
  227. if (tx_byte(*buf++))
  228. return -1;
  229. writew(I2CR_IEN, I2C_BASE + I2CR);
  230. while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
  231. udelay(1);
  232. return 0;
  233. }
  234. #endif /* CONFIG_HARD_I2C */