vom405.c 4.1 KB

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  1. /*
  2. * (C) Copyright 2001-2004
  3. * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/processor.h>
  25. #include <command.h>
  26. #include <malloc.h>
  27. extern void lxt971_no_sleep(void);
  28. /* fpga configuration data - not compressed, generated by bin2c */
  29. const unsigned char fpgadata[] =
  30. {
  31. #include "fpgadata.c"
  32. };
  33. int filesize = sizeof(fpgadata);
  34. int board_early_init_f (void)
  35. {
  36. /*
  37. * IRQ 0-15 405GP internally generated; active high; level sensitive
  38. * IRQ 16 405GP internally generated; active low; level sensitive
  39. * IRQ 17-24 RESERVED
  40. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  41. * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
  42. * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
  43. * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
  44. * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
  45. * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
  46. * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  47. */
  48. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  49. mtdcr(uicer, 0x00000000); /* disable all ints */
  50. mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
  51. mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
  52. mtdcr(uictr, 0x10000000); /* set int trigger levels */
  53. mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
  54. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  55. /*
  56. * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  57. */
  58. mtebc (epcr, 0xa8400000); /* ebc always driven */
  59. /*
  60. * Reset CPLD via GPIO12 (CS3) pin
  61. */
  62. out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12));
  63. udelay(1000); /* wait 1ms */
  64. out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12));
  65. udelay(1000); /* wait 1ms */
  66. return 0;
  67. }
  68. /* ------------------------------------------------------------------------- */
  69. int misc_init_f (void)
  70. {
  71. return 0; /* dummy implementation */
  72. }
  73. int misc_init_r (void)
  74. {
  75. DECLARE_GLOBAL_DATA_PTR;
  76. /* adjust flash start and offset */
  77. gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
  78. gd->bd->bi_flashoffset = 0;
  79. return (0);
  80. }
  81. /*
  82. * Check Board Identity:
  83. */
  84. int checkboard (void)
  85. {
  86. unsigned char str[64];
  87. int i = getenv_r ("serial#", str, sizeof(str));
  88. int flashcnt;
  89. int delay;
  90. volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000);
  91. puts ("Board: ");
  92. if (i == -1) {
  93. puts ("### No HW ID - assuming VOM405");
  94. } else {
  95. puts(str);
  96. }
  97. printf(" (PLD-Version=%02d)\n", *led_reg);
  98. /*
  99. * Flash LEDs
  100. */
  101. for (flashcnt = 0; flashcnt < 3; flashcnt++) {
  102. *led_reg = 0x40; /* LED_B..D off */
  103. for (delay = 0; delay < 100; delay++)
  104. udelay(1000);
  105. *led_reg = 0x47; /* LED_B..D on */
  106. for (delay = 0; delay < 50; delay++)
  107. udelay(1000);
  108. }
  109. *led_reg = 0x40;
  110. /*
  111. * Disable sleep mode in LXT971
  112. */
  113. lxt971_no_sleep();
  114. return 0;
  115. }
  116. /* ------------------------------------------------------------------------- */
  117. long int initdram (int board_type)
  118. {
  119. unsigned long val;
  120. mtdcr(memcfga, mem_mb0cf);
  121. val = mfdcr(memcfgd);
  122. #if 0
  123. printf("\nmb0cf=%x\n", val); /* test-only */
  124. printf("strap=%x\n", mfdcr(strap)); /* test-only */
  125. #endif
  126. return (4*1024*1024 << ((val & 0x000e0000) >> 17));
  127. }
  128. /* ------------------------------------------------------------------------- */
  129. int testdram (void)
  130. {
  131. /* TODO: XXX XXX XXX */
  132. printf ("test: 16 MB - ok\n");
  133. return (0);
  134. }