spr_misc.c 5.7 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <i2c.h>
  26. #include <net.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/hardware.h>
  29. #include <asm/arch/spr_emi.h>
  30. #include <asm/arch/spr_defs.h>
  31. #define CPU 0
  32. #define DDR 1
  33. #define SRAM_REL 0xD2801000
  34. DECLARE_GLOBAL_DATA_PTR;
  35. #if defined(CONFIG_CMD_NET)
  36. static int i2c_read_mac(uchar *buffer);
  37. #endif
  38. int dram_init(void)
  39. {
  40. /* Store complete RAM size and return */
  41. gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE);
  42. return 0;
  43. }
  44. void dram_init_banksize(void)
  45. {
  46. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  47. gd->bd->bi_dram[0].size = gd->ram_size;
  48. }
  49. int misc_init_r(void)
  50. {
  51. #if defined(CONFIG_CMD_NET)
  52. uchar mac_id[6];
  53. if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
  54. eth_setenv_enetaddr("ethaddr", mac_id);
  55. #endif
  56. setenv("verify", "n");
  57. #if defined(CONFIG_SPEAR_USBTTY)
  58. setenv("stdin", "usbtty");
  59. setenv("stdout", "usbtty");
  60. setenv("stderr", "usbtty");
  61. #endif
  62. return 0;
  63. }
  64. #ifdef CONFIG_SPEAR_EMI
  65. struct cust_emi_para {
  66. unsigned int tap;
  67. unsigned int tsdp;
  68. unsigned int tdpw;
  69. unsigned int tdpr;
  70. unsigned int tdcs;
  71. };
  72. /* EMI timing setting of m28w640hc of linux kernel */
  73. const struct cust_emi_para emi_timing_m28w640hc = {
  74. .tap = 0x10,
  75. .tsdp = 0x05,
  76. .tdpw = 0x0a,
  77. .tdpr = 0x0a,
  78. .tdcs = 0x05,
  79. };
  80. /* EMI timing setting of bootrom */
  81. const struct cust_emi_para emi_timing_bootrom = {
  82. .tap = 0xf,
  83. .tsdp = 0x0,
  84. .tdpw = 0xff,
  85. .tdpr = 0x111,
  86. .tdcs = 0x02,
  87. };
  88. void spear_emi_init(void)
  89. {
  90. const struct cust_emi_para *p = &emi_timing_m28w640hc;
  91. struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
  92. unsigned int cs;
  93. unsigned int val, tmp;
  94. val = readl(CONFIG_SPEAR_RASBASE);
  95. if (val & EMI_ACKMSK)
  96. tmp = 0x3f;
  97. else
  98. tmp = 0x0;
  99. writel(tmp, &emi_regs_p->ack);
  100. for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
  101. writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
  102. writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
  103. writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
  104. writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
  105. writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
  106. writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
  107. &emi_regs_p->bank_regs[cs].control);
  108. }
  109. }
  110. #endif
  111. int spear_board_init(ulong mach_type)
  112. {
  113. gd->bd->bi_arch_number = mach_type;
  114. /* adress of boot parameters */
  115. gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
  116. #ifdef CONFIG_SPEAR_EMI
  117. spear_emi_init();
  118. #endif
  119. return 0;
  120. }
  121. #if defined(CONFIG_CMD_NET)
  122. static int i2c_read_mac(uchar *buffer)
  123. {
  124. u8 buf[2];
  125. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  126. /* Check if mac in i2c memory is valid */
  127. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  128. /* Valid mac address is saved in i2c eeprom */
  129. i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
  130. return 0;
  131. }
  132. return -1;
  133. }
  134. static int write_mac(uchar *mac)
  135. {
  136. u8 buf[2];
  137. buf[0] = (u8)MAGIC_BYTE0;
  138. buf[1] = (u8)MAGIC_BYTE1;
  139. i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  140. buf[0] = (u8)~MAGIC_BYTE0;
  141. buf[1] = (u8)~MAGIC_BYTE1;
  142. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  143. /* check if valid MAC address is saved in I2C EEPROM or not? */
  144. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  145. i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
  146. puts("I2C EEPROM written with mac address \n");
  147. return 0;
  148. }
  149. puts("I2C EEPROM writing failed\n");
  150. return -1;
  151. }
  152. #endif
  153. int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  154. {
  155. void (*sram_setfreq) (unsigned int, unsigned int);
  156. unsigned int frequency;
  157. #if defined(CONFIG_CMD_NET)
  158. unsigned char mac[6];
  159. #endif
  160. if ((argc > 3) || (argc < 2))
  161. return cmd_usage(cmdtp);
  162. if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
  163. frequency = simple_strtoul(argv[2], NULL, 0);
  164. if (frequency > 333) {
  165. printf("Frequency is limited to 333MHz\n");
  166. return 1;
  167. }
  168. sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
  169. if (!strcmp(argv[1], "cpufreq")) {
  170. sram_setfreq(CPU, frequency);
  171. printf("CPU frequency changed to %u\n", frequency);
  172. } else {
  173. sram_setfreq(DDR, frequency);
  174. printf("DDR frequency changed to %u\n", frequency);
  175. }
  176. return 0;
  177. #if defined(CONFIG_CMD_NET)
  178. } else if (!strcmp(argv[1], "ethaddr")) {
  179. u32 reg;
  180. char *e, *s = argv[2];
  181. for (reg = 0; reg < 6; ++reg) {
  182. mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
  183. if (s)
  184. s = (*e) ? e + 1 : e;
  185. }
  186. write_mac(mac);
  187. return 0;
  188. #endif
  189. } else if (!strcmp(argv[1], "print")) {
  190. #if defined(CONFIG_CMD_NET)
  191. if (!i2c_read_mac(mac)) {
  192. printf("Ethaddr (from i2c mem) = %pM\n", mac);
  193. } else {
  194. printf("Ethaddr (from i2c mem) = Not set\n");
  195. }
  196. #endif
  197. return 0;
  198. }
  199. return cmd_usage(cmdtp);
  200. }
  201. U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
  202. "configure chip",
  203. "chip_config cpufreq/ddrfreq frequency\n"
  204. #if defined(CONFIG_CMD_NET)
  205. "chip_config ethaddr XX:XX:XX:XX:XX:XX\n"
  206. #endif
  207. "chip_config print");