uc101.h 3.1 KB

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  1. /*
  2. * (C) Copyright 2003-2009
  3. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef __CONFIG_H
  24. #define __CONFIG_H
  25. /*
  26. * High Level Configuration Options
  27. * (easy to change)
  28. */
  29. #define CONFIG_UC101 1 /* UC101 board */
  30. #define CONFIG_HOSTNAME uc101
  31. #include "manroland/common.h"
  32. #include "manroland/mpc5200-common.h"
  33. /*
  34. * Serial console configuration
  35. */
  36. #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
  37. /*
  38. * BOOTP options
  39. */
  40. #define CONFIG_BOOTP_BOOTFILESIZE
  41. #define CONFIG_BOOTP_BOOTPATH
  42. #define CONFIG_BOOTP_GATEWAY
  43. #define CONFIG_BOOTP_HOSTNAME
  44. /*
  45. * Flash configuration
  46. */
  47. #define CONFIG_SYS_MAX_FLASH_SECT 140
  48. /*
  49. * Environment settings
  50. */
  51. #define CONFIG_ENV_SECT_SIZE 0x10000
  52. /*
  53. * Memory map
  54. */
  55. #define CONFIG_SYS_IB_MASTER 0xc0510000 /* CS 6 */
  56. #define CONFIG_SYS_IB_EPLD 0xc0500000 /* CS 7 */
  57. /* SRAM */
  58. #define SRAM_BASE CONFIG_SYS_SRAM_BASE
  59. #define SRAM_LEN 0x1fffff
  60. #define SRAM_END (SRAM_BASE + SRAM_LEN)
  61. /*
  62. * GPIO configuration
  63. */
  64. #define CONFIG_SYS_GPS_PORT_CONFIG 0x4d558044
  65. #define CONFIG_SYS_MEMTEST_START 0x00300000
  66. #define CONFIG_SYS_MEMTEST_END 0x00f00000
  67. #define CONFIG_SYS_LOAD_ADDR 0x300000
  68. #define CONFIG_SYS_BOOTCS_CFG 0x00045D00
  69. /* 8Mbit SRAM @0x80100000 */
  70. #define CONFIG_SYS_CS1_SIZE 0x00200000
  71. #define CONFIG_SYS_CS1_CFG 0x21D00
  72. /* Display H1, Status Inputs, EPLD @0x80600000 8 Bit */
  73. #define CONFIG_SYS_CS3_START CONFIG_SYS_DISPLAY_BASE
  74. #define CONFIG_SYS_CS3_SIZE 0x00000100
  75. #define CONFIG_SYS_CS3_CFG 0x00081802
  76. /* Interbus Master 16 Bit */
  77. #define CONFIG_SYS_CS6_START CONFIG_SYS_IB_MASTER
  78. #define CONFIG_SYS_CS6_SIZE 0x00010000
  79. #define CONFIG_SYS_CS6_CFG 0x00FF3500
  80. /* Interbus EPLD 8 Bit */
  81. #define CONFIG_SYS_CS7_START CONFIG_SYS_IB_EPLD
  82. #define CONFIG_SYS_CS7_SIZE 0x00010000
  83. #define CONFIG_SYS_CS7_CFG 0x00081800
  84. /*-----------------------------------------------------------------------
  85. * IDE/ATA stuff Supports IDE harddisk
  86. *-----------------------------------------------------------------------
  87. */
  88. #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus*/
  89. /*---------------------------------------------------------------------*/
  90. /* Display addresses */
  91. /*---------------------------------------------------------------------*/
  92. #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38)
  93. #define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30)
  94. #endif /* __CONFIG_H */