pci_cfg.c 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225
  1. /*
  2. * Copyright 2009 Freescale Semiconductor, Inc.
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <asm/fsl_law.h>
  24. #include <pci.h>
  25. struct pci_info {
  26. u16 agent;
  27. u16 cfg;
  28. };
  29. /* The agent field is a bit mask in which each bit represents the value of
  30. * cfg_host_agt[] signal and the bit is set of the given interface would be
  31. * in agent/end-point mode for the given interface.
  32. *
  33. * The same idea is true of the cfg field. The bit will be set if the
  34. * interface would be enabled based on the value of cfg_IO_ports[] signal
  35. *
  36. * On MPC86xx/PQ3 based systems:
  37. * we extract cfg_host_agt from GUTS register PORBMSR
  38. * we extract cfg_IO_ports from GUTS register PORDEVSR
  39. *
  40. * cfg_IO_ports only exist on systems w/PCIe (we set cfg 0 for systems
  41. * without PCIe)
  42. */
  43. #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8560)
  44. static struct pci_info pci_config_info[] =
  45. {
  46. [LAW_TRGT_IF_PCI] = {
  47. .agent = (1 << 0) | (1 << 2),
  48. .cfg = 0,
  49. },
  50. };
  51. #elif defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
  52. static struct pci_info pci_config_info[] =
  53. {
  54. [LAW_TRGT_IF_PCI] = {
  55. .agent = (1 << 0),
  56. .cfg = 0,
  57. },
  58. };
  59. #elif defined(CONFIG_MPC8536)
  60. static struct pci_info pci_config_info[] =
  61. {
  62. [LAW_TRGT_IF_PCI] = {
  63. .agent = (1 << 6),
  64. .cfg = 0,
  65. },
  66. [LAW_TRGT_IF_PCIE_1] = {
  67. .agent = (1 << 5),
  68. .cfg = (1 << 2) | (1 << 3) | (1 << 5) | (1 << 7),
  69. },
  70. [LAW_TRGT_IF_PCIE_2] = {
  71. .agent = (1 << 3),
  72. .cfg = (1 << 5) | (1 << 7),
  73. },
  74. [LAW_TRGT_IF_PCIE_3] = {
  75. .agent = (1 << 1),
  76. .cfg = (1 << 7),
  77. },
  78. };
  79. #elif defined(CONFIG_MPC8544)
  80. static struct pci_info pci_config_info[] =
  81. {
  82. [LAW_TRGT_IF_PCI] = {
  83. .agent = (1 << 6),
  84. .cfg = 0,
  85. },
  86. [LAW_TRGT_IF_PCIE_1] = {
  87. .agent = (1 << 5),
  88. .cfg = (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
  89. (1 << 6) | (1 << 7),
  90. },
  91. [LAW_TRGT_IF_PCIE_2] = {
  92. .agent = (1 << 3),
  93. .cfg = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7),
  94. },
  95. [LAW_TRGT_IF_PCIE_3] = {
  96. .agent = (1 << 1),
  97. .cfg = (1 << 6) | (1 << 7),
  98. },
  99. };
  100. #elif defined(CONFIG_MPC8548)
  101. static struct pci_info pci_config_info[] =
  102. {
  103. [LAW_TRGT_IF_PCI_1] = {
  104. .agent = (1 << 4) | (1 << 6),
  105. .cfg = 0,
  106. },
  107. [LAW_TRGT_IF_PCI_2] = {
  108. .agent = (1 << 4) | (1 << 6),
  109. .cfg = 0,
  110. },
  111. /* PCI_2 is always host and we dont use iosel to determine enable/disable */
  112. [LAW_TRGT_IF_PCIE_1] = {
  113. .agent = (1 << 0) | (1 << 2),
  114. .cfg = (1 << 3) | (1 << 4) | (1 << 7),
  115. },
  116. };
  117. #elif defined(CONFIG_MPC8568)
  118. static struct pci_info pci_config_info[] =
  119. {
  120. [LAW_TRGT_IF_PCI] = {
  121. .agent = (1 << 0) | (1 << 4) | (1 << 6),
  122. .cfg = 0,
  123. },
  124. [LAW_TRGT_IF_PCIE_1] = {
  125. .agent = (1 << 0) | (1 << 2) | (1 << 4),
  126. .cfg = (1 << 3) | (1 << 4) | (1 << 7),
  127. },
  128. };
  129. #elif defined(CONFIG_MPC8569)
  130. static struct pci_info pci_config_info[] =
  131. {
  132. [LAW_TRGT_IF_PCIE_1] = {
  133. .agent = (1 << 0) | (1 << 6),
  134. .cfg = (1 << 0) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
  135. (1 << 8) | (1 << 0xc) | (1 << 0xf),
  136. },
  137. };
  138. #elif defined(CONFIG_MPC8572)
  139. static struct pci_info pci_config_info[] =
  140. {
  141. [LAW_TRGT_IF_PCIE_1] = {
  142. .agent = (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5),
  143. .cfg = (1 << 2) | (1 << 3) | (1 << 7) |
  144. (1 << 0xb) | (1 << 0xc) | (1 << 0xf),
  145. },
  146. [LAW_TRGT_IF_PCIE_2] = {
  147. .agent = (1 << 0) | (1 << 2) | (1 << 4) | (1 << 6),
  148. .cfg = (1 << 3) | (1 << 7),
  149. },
  150. [LAW_TRGT_IF_PCIE_3] = {
  151. .agent = (1 << 0) | (1 << 3) | (1 << 5) | (1 << 6),
  152. .cfg = (1 << 7),
  153. },
  154. };
  155. #elif defined(CONFIG_MPC8610)
  156. static struct pci_info pci_config_info[] =
  157. {
  158. [LAW_TRGT_IF_PCI_1] = {
  159. .agent = (1 << 4) | (1 << 5) | (1 << 6),
  160. .cfg = 0,
  161. },
  162. [LAW_TRGT_IF_PCIE_1] = {
  163. .agent = (1 << 0) | (1 << 2) | (1 << 5),
  164. .cfg = (1 << 1) | (1 << 4),
  165. },
  166. [LAW_TRGT_IF_PCIE_2] = {
  167. .agent = (1 << 0) | (1 << 1) | (1 << 4),
  168. .cfg = (1 << 0) | (1 << 4),
  169. },
  170. };
  171. #elif defined(CONFIG_MPC8641)
  172. static struct pci_info pci_config_info[] =
  173. {
  174. [LAW_TRGT_IF_PCIE_1] = {
  175. .agent = 0, /* we dont use agent on 8641 */
  176. .cfg = (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) |
  177. (1 << 7) | (1 << 0xe) | (1 << 0xf),
  178. },
  179. };
  180. #elif defined(CONFIG_P1011) || defined(CONFIG_P1020)
  181. static struct pci_info pci_config_info[] =
  182. {
  183. [LAW_TRGT_IF_PCIE_1] = {
  184. .agent = (1 << 0) | (1 << 1),
  185. .cfg = (1 << 0) | (1 << 6) | (1 << 0xe) | (1 << 0xf),
  186. },
  187. [LAW_TRGT_IF_PCIE_2] = {
  188. .agent = (1 << 0) | (1 << 2),
  189. .cfg = (1 << 0xe),
  190. },
  191. };
  192. #elif defined(CONFIG_P2010) || defined(CONFIG_P2020)
  193. static struct pci_info pci_config_info[] =
  194. {
  195. [LAW_TRGT_IF_PCIE_1] = {
  196. .agent = (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5),
  197. .cfg = (1 << 0) | (1 << 2) | (1 << 4) | (1 << 6) |
  198. (1 << 0xd) | (1 << 0xe) | (1 << 0xf),
  199. },
  200. [LAW_TRGT_IF_PCIE_2] = {
  201. .agent = (1 << 0) | (1 << 2) | (1 << 4) | (1 << 6),
  202. .cfg = (1 << 2) | (1 << 0xe),
  203. },
  204. [LAW_TRGT_IF_PCIE_3] = {
  205. .agent = (1 << 0) | (1 << 3) | (1 << 5) | (1 << 6),
  206. .cfg = (1 << 2) | (1 << 4),
  207. },
  208. };
  209. #else
  210. #error Need to define pci_config_info for processor
  211. #endif
  212. int is_fsl_pci_agent(enum law_trgt_if trgt, u32 host_agent)
  213. {
  214. return ((1 << host_agent) & pci_config_info[trgt].agent);
  215. }
  216. int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel)
  217. {
  218. return ((1 << io_sel) & pci_config_info[trgt].cfg);
  219. }