mvtwsi.c 12 KB

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  1. /*
  2. * Driver for the TWSI (i2c) controller found on the Marvell
  3. * orion5x and kirkwood SoC families.
  4. *
  5. * Author: Albert Aribaud <albert.u.boot@aribaud.net>
  6. * Copyright (c) 2010 Albert Aribaud.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  24. * MA 02110-1301 USA
  25. */
  26. #include <common.h>
  27. #include <i2c.h>
  28. #include <asm/errno.h>
  29. #include <asm/io.h>
  30. /*
  31. * include a file that will provide CONFIG_I2C_MVTWSI_BASE
  32. * and possibly other settings
  33. */
  34. #if defined(CONFIG_ORION5X)
  35. #include <asm/arch/orion5x.h>
  36. #elif defined(CONFIG_KIRKWOOD)
  37. #include <asm/arch/kirkwood.h>
  38. #else
  39. #error Driver mvtwsi not supported by SoC or board
  40. #endif
  41. /*
  42. * TWSI register structure
  43. */
  44. struct mvtwsi_registers {
  45. u32 slave_address;
  46. u32 data;
  47. u32 control;
  48. union {
  49. u32 status; /* when reading */
  50. u32 baudrate; /* when writing */
  51. };
  52. u32 xtnd_slave_addr;
  53. u32 reserved[2];
  54. u32 soft_reset;
  55. };
  56. /*
  57. * Control register fields
  58. */
  59. #define MVTWSI_CONTROL_ACK 0x00000004
  60. #define MVTWSI_CONTROL_IFLG 0x00000008
  61. #define MVTWSI_CONTROL_STOP 0x00000010
  62. #define MVTWSI_CONTROL_START 0x00000020
  63. #define MVTWSI_CONTROL_TWSIEN 0x00000040
  64. #define MVTWSI_CONTROL_INTEN 0x00000080
  65. /*
  66. * Status register values -- only those expected in normal master
  67. * operation on non-10-bit-address devices; whatever status we don't
  68. * expect in nominal conditions (bus errors, arbitration losses,
  69. * missing ACKs...) we just pass back to the caller as an error
  70. * code.
  71. */
  72. #define MVTWSI_STATUS_START 0x08
  73. #define MVTWSI_STATUS_REPEATED_START 0x10
  74. #define MVTWSI_STATUS_ADDR_W_ACK 0x18
  75. #define MVTWSI_STATUS_DATA_W_ACK 0x28
  76. #define MVTWSI_STATUS_ADDR_R_ACK 0x40
  77. #define MVTWSI_STATUS_ADDR_R_NAK 0x48
  78. #define MVTWSI_STATUS_DATA_R_ACK 0x50
  79. #define MVTWSI_STATUS_DATA_R_NAK 0x58
  80. #define MVTWSI_STATUS_IDLE 0xF8
  81. /*
  82. * The single instance of the controller we'll be dealing with
  83. */
  84. static struct mvtwsi_registers *twsi =
  85. (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE;
  86. /*
  87. * Returned statuses are 0 for success and nonzero otherwise.
  88. * Currently, cmd_i2c and cmd_eeprom do not interpret an error status.
  89. * Thus to ease debugging, the return status contains some debug info:
  90. * - bits 31..24 are error class: 1 is timeout, 2 is 'status mismatch'.
  91. * - bits 23..16 are the last value of the control register.
  92. * - bits 15..8 are the last value of the status register.
  93. * - bits 7..0 are the expected value of the status register.
  94. */
  95. #define MVTWSI_ERROR_WRONG_STATUS 0x01
  96. #define MVTWSI_ERROR_TIMEOUT 0x02
  97. #define MVTWSI_ERROR(ec, lc, ls, es) (((ec << 24) & 0xFF000000) | \
  98. ((lc << 16) & 0x00FF0000) | ((ls<<8) & 0x0000FF00) | (es & 0xFF))
  99. /*
  100. * Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
  101. * return 0 (ok) or return 'wrong status'.
  102. */
  103. static int twsi_wait(int expected_status)
  104. {
  105. int control, status;
  106. int timeout = 1000;
  107. do {
  108. control = readl(&twsi->control);
  109. if (control & MVTWSI_CONTROL_IFLG) {
  110. status = readl(&twsi->status);
  111. if (status == expected_status)
  112. return 0;
  113. else
  114. return MVTWSI_ERROR(
  115. MVTWSI_ERROR_WRONG_STATUS,
  116. control, status, expected_status);
  117. }
  118. udelay(10); /* one clock cycle at 100 kHz */
  119. } while (timeout--);
  120. status = readl(&twsi->status);
  121. return MVTWSI_ERROR(
  122. MVTWSI_ERROR_TIMEOUT, control, status, expected_status);
  123. }
  124. /*
  125. * These flags are ORed to any write to the control register
  126. * They allow global setting of TWSIEN and ACK.
  127. * By default none are set.
  128. * twsi_start() sets TWSIEN (in case the controller was disabled)
  129. * twsi_recv() sets ACK or resets it depending on expected status.
  130. */
  131. static u8 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
  132. /*
  133. * Assert the START condition, either in a single I2C transaction
  134. * or inside back-to-back ones (repeated starts).
  135. */
  136. static int twsi_start(int expected_status)
  137. {
  138. /* globally set TWSIEN in case it was not */
  139. twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
  140. /* assert START */
  141. writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
  142. /* wait for controller to process START */
  143. return twsi_wait(expected_status);
  144. }
  145. /*
  146. * Send a byte (i2c address or data).
  147. */
  148. static int twsi_send(u8 byte, int expected_status)
  149. {
  150. /* put byte in data register for sending */
  151. writel(byte, &twsi->data);
  152. /* clear any pending interrupt -- that'll cause sending */
  153. writel(twsi_control_flags, &twsi->control);
  154. /* wait for controller to receive byte and check ACK */
  155. return twsi_wait(expected_status);
  156. }
  157. /*
  158. * Receive a byte.
  159. * Global mvtwsi_control_flags variable says if we should ack or nak.
  160. */
  161. static int twsi_recv(u8 *byte)
  162. {
  163. int expected_status, status;
  164. /* compute expected status based on ACK bit in global control flags */
  165. if (twsi_control_flags & MVTWSI_CONTROL_ACK)
  166. expected_status = MVTWSI_STATUS_DATA_R_ACK;
  167. else
  168. expected_status = MVTWSI_STATUS_DATA_R_NAK;
  169. /* acknowledge *previous state* and launch receive */
  170. writel(twsi_control_flags, &twsi->control);
  171. /* wait for controller to receive byte and assert ACK or NAK */
  172. status = twsi_wait(expected_status);
  173. /* if we did receive expected byte then store it */
  174. if (status == 0)
  175. *byte = readl(&twsi->data);
  176. /* return status */
  177. return status;
  178. }
  179. /*
  180. * Assert the STOP condition.
  181. * This is also used to force the bus back in idle (SDA=SCL=1).
  182. */
  183. static int twsi_stop(int status)
  184. {
  185. int control, stop_status;
  186. int timeout = 1000;
  187. /* assert STOP */
  188. control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
  189. writel(control, &twsi->control);
  190. /* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
  191. do {
  192. stop_status = readl(&twsi->status);
  193. if (stop_status == MVTWSI_STATUS_IDLE)
  194. break;
  195. udelay(10); /* one clock cycle at 100 kHz */
  196. } while (timeout--);
  197. control = readl(&twsi->control);
  198. if (stop_status != MVTWSI_STATUS_IDLE)
  199. if (status == 0)
  200. status = MVTWSI_ERROR(
  201. MVTWSI_ERROR_TIMEOUT,
  202. control, status, MVTWSI_STATUS_IDLE);
  203. return status;
  204. }
  205. /*
  206. * Ugly formula to convert m and n values to a frequency comes from
  207. * TWSI specifications
  208. */
  209. #define TWSI_FREQUENCY(m, n) \
  210. ((u8) (CONFIG_SYS_TCLK / (10 * (m + 1) * 2 * (1 << n))))
  211. /*
  212. * These are required to be reprogrammed before enabling the controller
  213. * because a reset loses them.
  214. * Default values come from the spec, but a twsi_reset will change them.
  215. * twsi_slave_address left uninitialized lest checkpatch.pl complains.
  216. */
  217. /* Baudrate generator: m (bits 7..4) =4, n (bits 3..0) =4 */
  218. static u8 twsi_baud_rate = 0x44; /* baudrate at controller reset */
  219. /* Default frequency corresponding to default m=4, n=4 */
  220. static u8 twsi_actual_speed = TWSI_FREQUENCY(4, 4);
  221. /* Default slave address is 0 (so is an uninitialized static) */
  222. static u8 twsi_slave_address;
  223. /*
  224. * Reset controller.
  225. * Called at end of i2c_init unsuccessful i2c transactions.
  226. * Controller reset also resets the baud rate and slave address, so
  227. * re-establish them.
  228. */
  229. static void twsi_reset(void)
  230. {
  231. /* ensure controller will be enabled by any twsi*() function */
  232. twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
  233. /* reset controller */
  234. writel(0, &twsi->soft_reset);
  235. /* wait 2 ms -- this is what the Marvell LSP does */
  236. udelay(20000);
  237. /* set baud rate */
  238. writel(twsi_baud_rate, &twsi->baudrate);
  239. /* set slave address even though we don't use it */
  240. writel(twsi_slave_address, &twsi->slave_address);
  241. writel(0, &twsi->xtnd_slave_addr);
  242. /* assert STOP but don't care for the result */
  243. (void) twsi_stop(0);
  244. }
  245. /*
  246. * I2C init called by cmd_i2c when doing 'i2c reset'.
  247. * Sets baud to the highest possible value not exceeding requested one.
  248. */
  249. void i2c_init(int requested_speed, int slaveadd)
  250. {
  251. int tmp_speed, highest_speed, n, m;
  252. int baud = 0x44; /* baudrate at controller reset */
  253. /* use actual speed to collect progressively higher values */
  254. highest_speed = 0;
  255. /* compute m, n setting for highest speed not above requested speed */
  256. for (n = 0; n < 8; n++) {
  257. for (m = 0; m < 16; m++) {
  258. tmp_speed = TWSI_FREQUENCY(m, n);
  259. if ((tmp_speed <= requested_speed)
  260. && (tmp_speed > highest_speed)) {
  261. highest_speed = tmp_speed;
  262. baud = (m << 3) | n;
  263. }
  264. }
  265. }
  266. /* save baud rate and slave for later calls to twsi_reset */
  267. twsi_baud_rate = baud;
  268. twsi_actual_speed = highest_speed;
  269. twsi_slave_address = slaveadd;
  270. /* reset controller */
  271. twsi_reset();
  272. }
  273. /*
  274. * Begin I2C transaction with expected start status, at given address.
  275. * Common to i2c_probe, i2c_read and i2c_write.
  276. * Expected address status will derive from direction bit (bit 0) in addr.
  277. */
  278. static int i2c_begin(int expected_start_status, u8 addr)
  279. {
  280. int status, expected_addr_status;
  281. /* compute expected address status from direction bit in addr */
  282. if (addr & 1) /* reading */
  283. expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
  284. else /* writing */
  285. expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
  286. /* assert START */
  287. status = twsi_start(expected_start_status);
  288. /* send out the address if the start went well */
  289. if (status == 0)
  290. status = twsi_send(addr, expected_addr_status);
  291. /* return ok or status of first failure to caller */
  292. return status;
  293. }
  294. /*
  295. * I2C probe called by cmd_i2c when doing 'i2c probe'.
  296. * Begin read, nak data byte, end.
  297. */
  298. int i2c_probe(uchar chip)
  299. {
  300. u8 dummy_byte;
  301. int status;
  302. /* begin i2c read */
  303. status = i2c_begin(MVTWSI_STATUS_START, (chip << 1) | 1);
  304. /* dummy read was accepted: receive byte but NAK it. */
  305. if (status == 0)
  306. status = twsi_recv(&dummy_byte);
  307. /* Stop transaction */
  308. twsi_stop(0);
  309. /* return 0 or status of first failure */
  310. return status;
  311. }
  312. /*
  313. * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
  314. * Begin write, send address byte(s), begin read, receive data bytes, end.
  315. *
  316. * NOTE: some EEPROMS want a stop right before the second start, while
  317. * some will choke if it is there. Deciding which we should do is eeprom
  318. * stuff, not i2c, but at the moment the APIs won't let us put it in
  319. * cmd_eeprom, so we have to choose here, and for the moment that'll be
  320. * a repeated start without a preceding stop.
  321. */
  322. int i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
  323. {
  324. int status;
  325. /* begin i2c write to send the address bytes */
  326. status = i2c_begin(MVTWSI_STATUS_START, (dev << 1));
  327. /* send addr bytes */
  328. while ((status == 0) && alen--)
  329. status = twsi_send(addr >> (8*alen),
  330. MVTWSI_STATUS_DATA_W_ACK);
  331. /* begin i2c read to receive eeprom data bytes */
  332. if (status == 0)
  333. status = i2c_begin(
  334. MVTWSI_STATUS_REPEATED_START, (dev << 1) | 1);
  335. /* prepare ACK if at least one byte must be received */
  336. if (length > 0)
  337. twsi_control_flags |= MVTWSI_CONTROL_ACK;
  338. /* now receive actual bytes */
  339. while ((status == 0) && length--) {
  340. /* reset NAK if we if no more to read now */
  341. if (length == 0)
  342. twsi_control_flags &= ~MVTWSI_CONTROL_ACK;
  343. /* read current byte */
  344. status = twsi_recv(data++);
  345. }
  346. /* Stop transaction */
  347. status = twsi_stop(status);
  348. /* return 0 or status of first failure */
  349. return status;
  350. }
  351. /*
  352. * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
  353. * Begin write, send address byte(s), send data bytes, end.
  354. */
  355. int i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
  356. {
  357. int status;
  358. /* begin i2c write to send the eeprom adress bytes then data bytes */
  359. status = i2c_begin(MVTWSI_STATUS_START, (dev << 1));
  360. /* send addr bytes */
  361. while ((status == 0) && alen--)
  362. status = twsi_send(addr >> (8*alen),
  363. MVTWSI_STATUS_DATA_W_ACK);
  364. /* send data bytes */
  365. while ((status == 0) && (length-- > 0))
  366. status = twsi_send(*(data++), MVTWSI_STATUS_DATA_W_ACK);
  367. /* Stop transaction */
  368. status = twsi_stop(status);
  369. /* return 0 or status of first failure */
  370. return status;
  371. }
  372. /*
  373. * Bus set routine: we only support bus 0.
  374. */
  375. int i2c_set_bus_num(unsigned int bus)
  376. {
  377. if (bus > 0) {
  378. return -1;
  379. }
  380. return 0;
  381. }
  382. /*
  383. * Bus get routine: hard-return bus 0.
  384. */
  385. unsigned int i2c_get_bus_num(void)
  386. {
  387. return 0;
  388. }