ti_pci1410a.c 15 KB

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  1. /*
  2. * (C) Copyright 2000-2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. * (C) Copyright 2002
  5. * Daniel Engström, Omicron Ceti AB
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. *
  25. ********************************************************************
  26. *
  27. * Lots of code copied from:
  28. *
  29. * m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
  30. * (C) 1999-2000 Magnus Damm <damm@bitsmart.com>
  31. *
  32. * "The ExCA standard specifies that socket controllers should provide
  33. * two IO and five memory windows per socket, which can be independently
  34. * configured and positioned in the host address space and mapped to
  35. * arbitrary segments of card address space. " - David A Hinds. 1999
  36. *
  37. * This controller does _not_ meet the ExCA standard.
  38. *
  39. * m8xx pcmcia controller brief info:
  40. * + 8 windows (attrib, mem, i/o)
  41. * + up to two slots (SLOT_A and SLOT_B)
  42. * + inputpins, outputpins, event and mask registers.
  43. * - no offset register. sigh.
  44. *
  45. * Because of the lacking offset register we must map the whole card.
  46. * We assign each memory window PCMCIA_MEM_WIN_SIZE address space.
  47. * Make sure there is (PCMCIA_MEM_WIN_SIZE * PCMCIA_MEM_WIN_NO
  48. * * PCMCIA_SOCKETS_NO) bytes at PCMCIA_MEM_WIN_BASE.
  49. * The i/o windows are dynamically allocated at PCMCIA_IO_WIN_BASE.
  50. * They are maximum 64KByte each...
  51. */
  52. #undef DEBUG /**/
  53. /*
  54. * PCMCIA support
  55. */
  56. #include <common.h>
  57. #include <command.h>
  58. #include <config.h>
  59. #include <pci.h>
  60. #include <asm/io.h>
  61. #include <pcmcia.h>
  62. #include <cmd_pcmcia.h>
  63. #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && defined(CONFIG_IDE_TI_CARDBUS)
  64. int pcmcia_on(int ide_base_bus);
  65. static int pcmcia_off(void);
  66. static int hardware_disable(int slot);
  67. static int hardware_enable(int slot);
  68. static int voltage_set(int slot, int vcc, int vpp);
  69. static void print_funcid(int func);
  70. static void print_fixed(volatile uchar *p);
  71. static int identify(volatile uchar *p);
  72. static int check_ide_device(int slot, int ide_base_bus);
  73. /* ------------------------------------------------------------------------- */
  74. const char *indent = "\t ";
  75. /* ------------------------------------------------------------------------- */
  76. int do_pinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  77. {
  78. #ifndef CFG_FISRT_PCMCIA_BUS
  79. # define CFG_FISRT_PCMCIA_BUS 0
  80. #endif
  81. int rcode = 0;
  82. if (argc != 2) {
  83. printf ("Usage: pinit {on | off}\n");
  84. return 1;
  85. }
  86. if (strcmp(argv[1],"on") == 0) {
  87. rcode = pcmcia_on(CFG_FISRT_PCMCIA_BUS);
  88. } else if (strcmp(argv[1],"off") == 0) {
  89. rcode = pcmcia_off();
  90. } else {
  91. printf ("Usage: pinit {on | off}\n");
  92. return 1;
  93. }
  94. return rcode;
  95. }
  96. /* ------------------------------------------------------------------------- */
  97. static struct pci_device_id supported[] = {
  98. { PCI_VENDOR_ID_TI, 0xac50 }, /* Ti PCI1410A */
  99. { PCI_VENDOR_ID_TI, 0xac56 }, /* Ti PCI1510 */
  100. { }
  101. };
  102. static pci_dev_t devbusfn;
  103. static u32 socket_base;
  104. static u32 pcmcia_cis_ptr;
  105. int pcmcia_on(int ide_base_bus)
  106. {
  107. u16 dev_id;
  108. u32 socket_status;
  109. int slot = 0;
  110. int cis_len;
  111. u16 io_base;
  112. u16 io_len;
  113. /*
  114. * Find the CardBus PCI device(s).
  115. */
  116. if ((devbusfn = pci_find_devices(supported, 0)) < 0) {
  117. printf("Ti CardBus: not found\n");
  118. return 1;
  119. }
  120. pci_read_config_word(devbusfn, PCI_DEVICE_ID, &dev_id);
  121. if (dev_id == 0xac56) {
  122. debug("Enable PCMCIA Ti PCI1510\n");
  123. } else {
  124. debug("Enable PCMCIA Ti PCI1410A\n");
  125. }
  126. pcmcia_cis_ptr = CFG_PCMCIA_CIS_WIN;
  127. cis_len = CFG_PCMCIA_CIS_WIN_SIZE;
  128. io_base = CFG_PCMCIA_IO_WIN;
  129. io_len = CFG_PCMCIA_IO_WIN_SIZE;
  130. /*
  131. * Setup the PCI device.
  132. */
  133. pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &socket_base);
  134. socket_base &= ~0xf;
  135. socket_status = readl(socket_base+8);
  136. if ((socket_status & 6) == 0) {
  137. printf("Card Present: ");
  138. switch (socket_status & 0x3c00) {
  139. case 0x400:
  140. printf("5V ");
  141. break;
  142. case 0x800:
  143. printf("3.3V ");
  144. break;
  145. case 0xc00:
  146. printf("3.3/5V ");
  147. break;
  148. default:
  149. printf("unsupported Vcc ");
  150. break;
  151. }
  152. switch (socket_status & 0x30) {
  153. case 0x10:
  154. printf("16bit PC-Card\n");
  155. break;
  156. case 0x20:
  157. printf("32bit CardBus Card\n");
  158. break;
  159. default:
  160. printf("8bit PC-Card\n");
  161. break;
  162. }
  163. }
  164. writeb(0x41, socket_base + 0x806); /* Enable I/O window 0 and memory window 0 */
  165. writeb(0x0e, socket_base + 0x807); /* Reset I/O window options */
  166. /* Careful: the linux yenta driver do not seem to reset the offset
  167. * in the i/o windows, so leaving them non-zero is a problem */
  168. writeb(io_base & 0xff, socket_base + 0x808); /* I/O window 0 base address */
  169. writeb(io_base>>8, socket_base + 0x809);
  170. writeb((io_base + io_len - 1) & 0xff, socket_base + 0x80a); /* I/O window 0 end address */
  171. writeb((io_base + io_len - 1)>>8, socket_base + 0x80b);
  172. writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address 0x000 */
  173. writeb(0x00, socket_base + 0x837);
  174. writeb((pcmcia_cis_ptr&0x000ff000) >> 12,
  175. socket_base + 0x810); /* Memory window 0 start address bits 19-12 */
  176. writeb((pcmcia_cis_ptr&0x00f00000) >> 20,
  177. socket_base + 0x811); /* Memory window 0 start address bits 23-20 */
  178. writeb(((pcmcia_cis_ptr+cis_len-1) & 0x000ff000) >> 12,
  179. socket_base + 0x812); /* Memory window 0 end address bits 19-12*/
  180. writeb(((pcmcia_cis_ptr+cis_len-1) & 0x00f00000) >> 20,
  181. socket_base + 0x813); /* Memory window 0 end address bits 23-20*/
  182. writeb(0x00, socket_base + 0x814); /* Memory window 0 offset bits 19-12 */
  183. writeb(0x40, socket_base + 0x815); /* Memory window 0 offset bits 23-20 and
  184. * options (read/write, attribute access) */
  185. writeb(0x00, socket_base + 0x816); /* ExCA card-detect and general control */
  186. writeb(0x00, socket_base + 0x81e); /* ExCA global control (interrupt modes) */
  187. writeb((pcmcia_cis_ptr & 0xff000000) >> 24,
  188. socket_base + 0x840); /* Memory window address bits 31-24 */
  189. /* turn off voltage */
  190. if (voltage_set(slot, 0, 0)) {
  191. return 1;
  192. }
  193. /* Enable external hardware */
  194. if (hardware_enable(slot)) {
  195. return 1;
  196. }
  197. if (check_ide_device(slot, ide_base_bus)) {
  198. return 1;
  199. }
  200. return 0;
  201. }
  202. /* ------------------------------------------------------------------------- */
  203. static int pcmcia_off (void)
  204. {
  205. int slot = 0;
  206. writeb(0x00, socket_base + 0x806); /* disable all I/O and memory windows */
  207. writeb(0x00, socket_base + 0x808); /* I/O window 0 base address */
  208. writeb(0x00, socket_base + 0x809);
  209. writeb(0x00, socket_base + 0x80a); /* I/O window 0 end address */
  210. writeb(0x00, socket_base + 0x80b);
  211. writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address */
  212. writeb(0x00, socket_base + 0x837);
  213. writeb(0x00, socket_base + 0x80c); /* I/O window 1 base address */
  214. writeb(0x00, socket_base + 0x80d);
  215. writeb(0x00, socket_base + 0x80e); /* I/O window 1 end address */
  216. writeb(0x00, socket_base + 0x80f);
  217. writeb(0x00, socket_base + 0x838); /* I/O window 1 offset address */
  218. writeb(0x00, socket_base + 0x839);
  219. writeb(0x00, socket_base + 0x810); /* Memory window 0 start address */
  220. writeb(0x00, socket_base + 0x811);
  221. writeb(0x00, socket_base + 0x812); /* Memory window 0 end address */
  222. writeb(0x00, socket_base + 0x813);
  223. writeb(0x00, socket_base + 0x814); /* Memory window 0 offset */
  224. writeb(0x00, socket_base + 0x815);
  225. writeb(0xc0, socket_base + 0x840); /* Memory window 0 page address */
  226. /* turn off voltage */
  227. voltage_set(slot, 0, 0);
  228. /* disable external hardware */
  229. printf ("Shutdown and Poweroff Ti PCI1410A\n");
  230. hardware_disable(slot);
  231. return 0;
  232. }
  233. /* ------------------------------------------------------------------------- */
  234. #define MAX_TUPEL_SZ 512
  235. #define MAX_FEATURES 4
  236. int ide_devices_found;
  237. static int check_ide_device(int slot, int ide_base_bus)
  238. {
  239. volatile uchar *ident = NULL;
  240. volatile uchar *feature_p[MAX_FEATURES];
  241. volatile uchar *p, *start;
  242. int n_features = 0;
  243. uchar func_id = ~0;
  244. uchar code, len;
  245. ushort config_base = 0;
  246. int found = 0;
  247. int i;
  248. u32 socket_status;
  249. debug ("PCMCIA MEM: %08X\n", pcmcia_cis_ptr);
  250. socket_status = readl(socket_base+8);
  251. if ((socket_status & 6) != 0 || (socket_status & 0x20) != 0) {
  252. printf("no card or CardBus card\n");
  253. return 1;
  254. }
  255. start = p = (volatile uchar *) pcmcia_cis_ptr;
  256. while ((p - start) < MAX_TUPEL_SZ) {
  257. code = *p; p += 2;
  258. if (code == 0xFF) { /* End of chain */
  259. break;
  260. }
  261. len = *p; p += 2;
  262. #if defined(DEBUG) && (DEBUG > 1)
  263. {
  264. volatile uchar *q = p;
  265. printf ("\nTuple code %02x length %d\n\tData:",
  266. code, len);
  267. for (i = 0; i < len; ++i) {
  268. printf (" %02x", *q);
  269. q+= 2;
  270. }
  271. }
  272. #endif /* DEBUG */
  273. switch (code) {
  274. case CISTPL_VERS_1:
  275. ident = p + 4;
  276. break;
  277. case CISTPL_FUNCID:
  278. /* Fix for broken SanDisk which may have 0x80 bit set */
  279. func_id = *p & 0x7F;
  280. break;
  281. case CISTPL_FUNCE:
  282. if (n_features < MAX_FEATURES)
  283. feature_p[n_features++] = p;
  284. break;
  285. case CISTPL_CONFIG:
  286. config_base = (*(p+6) << 8) + (*(p+4));
  287. debug ("\n## Config_base = %04x ###\n", config_base);
  288. default:
  289. break;
  290. }
  291. p += 2 * len;
  292. }
  293. found = identify(ident);
  294. if (func_id != ((uchar)~0)) {
  295. print_funcid (func_id);
  296. if (func_id == CISTPL_FUNCID_FIXED)
  297. found = 1;
  298. else
  299. return 1; /* no disk drive */
  300. }
  301. for (i=0; i<n_features; ++i) {
  302. print_fixed(feature_p[i]);
  303. }
  304. if (!found) {
  305. printf("unknown card type\n");
  306. return 1;
  307. }
  308. /* select config index 1 */
  309. writeb(1, pcmcia_cis_ptr + config_base);
  310. #if 0
  311. printf("Confiuration Option Register: %02x\n", readb(pcmcia_cis_ptr + config_base));
  312. printf("Card Confiuration and Status Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 2));
  313. printf("Pin Replacement Register Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 4));
  314. printf("Socket and Copy Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 6));
  315. #endif
  316. ide_devices_found |= (1 << (slot+ide_base_bus));
  317. return 0;
  318. }
  319. static int voltage_set(int slot, int vcc, int vpp)
  320. {
  321. u32 socket_control;
  322. int reg=0;
  323. switch (slot) {
  324. case 0:
  325. reg = socket_base + 0x10;
  326. break;
  327. default:
  328. return 1;
  329. }
  330. socket_control = 0;
  331. switch (vcc) {
  332. case 50:
  333. socket_control |= 0x20;
  334. break;
  335. case 33:
  336. socket_control |= 0x30;
  337. break;
  338. case 0:
  339. default:
  340. }
  341. switch (vpp) {
  342. case 120:
  343. socket_control |= 0x1;
  344. break;
  345. case 50:
  346. socket_control |= 0x2;
  347. break;
  348. case 33:
  349. socket_control |= 0x3;
  350. break;
  351. case 0:
  352. default:
  353. }
  354. writel(socket_control, reg);
  355. debug ("voltage_set: Ti PCI1410A Slot %d, Vcc=%d.%d, Vpp=%d.%d\n",
  356. slot, vcc/10, vcc%10, vpp/10, vpp%10);
  357. udelay(500);
  358. return 0;
  359. }
  360. static int hardware_enable(int slot)
  361. {
  362. u32 socket_status;
  363. u16 brg_ctrl;
  364. int is_82365sl;
  365. socket_status = readl(socket_base+8);
  366. if ((socket_status & 6) == 0) {
  367. switch (socket_status & 0x3c00) {
  368. case 0x400:
  369. printf("5V ");
  370. voltage_set(slot, 50, 0);
  371. break;
  372. case 0x800:
  373. voltage_set(slot, 33, 0);
  374. break;
  375. case 0xc00:
  376. voltage_set(slot, 33, 0);
  377. break;
  378. default:
  379. voltage_set(slot, 0, 0);
  380. break;
  381. }
  382. } else {
  383. voltage_set(slot, 0, 0);
  384. }
  385. pci_read_config_word(devbusfn, PCI_BRIDGE_CONTROL, &brg_ctrl);
  386. brg_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
  387. pci_write_config_word(devbusfn, PCI_BRIDGE_CONTROL, brg_ctrl);
  388. is_82365sl = ((readb(socket_base+0x800) & 0x0f) == 2);
  389. writeb(is_82365sl?0x90:0x98, socket_base+0x802);
  390. writeb(0x67, socket_base+0x803);
  391. udelay(100000);
  392. #if 0
  393. printf("ExCA Id %02x, Card Status %02x, Power config %02x, Interrupt Config %02x, bridge control %04x %d\n",
  394. readb(socket_base+0x800), readb(socket_base+0x801),
  395. readb(socket_base+0x802), readb(socket_base+0x803), brg_ctrl, is_82365sl);
  396. #endif
  397. return ((readb(socket_base+0x801)&0x6c)==0x6c)?0:1;
  398. }
  399. static int hardware_disable(int slot)
  400. {
  401. voltage_set(slot, 0, 0);
  402. return 0;
  403. }
  404. static void print_funcid(int func)
  405. {
  406. puts(indent);
  407. switch (func) {
  408. case CISTPL_FUNCID_MULTI:
  409. puts(" Multi-Function");
  410. break;
  411. case CISTPL_FUNCID_MEMORY:
  412. puts(" Memory");
  413. break;
  414. case CISTPL_FUNCID_SERIAL:
  415. puts(" Serial Port");
  416. break;
  417. case CISTPL_FUNCID_PARALLEL:
  418. puts(" Parallel Port");
  419. break;
  420. case CISTPL_FUNCID_FIXED:
  421. puts(" Fixed Disk");
  422. break;
  423. case CISTPL_FUNCID_VIDEO:
  424. puts(" Video Adapter");
  425. break;
  426. case CISTPL_FUNCID_NETWORK:
  427. puts(" Network Adapter");
  428. break;
  429. case CISTPL_FUNCID_AIMS:
  430. puts(" AIMS Card");
  431. break;
  432. case CISTPL_FUNCID_SCSI:
  433. puts(" SCSI Adapter");
  434. break;
  435. default:
  436. puts(" Unknown");
  437. break;
  438. }
  439. puts(" Card\n");
  440. }
  441. /* ------------------------------------------------------------------------- */
  442. static void print_fixed(volatile uchar *p)
  443. {
  444. if (p == NULL)
  445. return;
  446. puts(indent);
  447. switch (*p) {
  448. case CISTPL_FUNCE_IDE_IFACE:
  449. { uchar iface = *(p+2);
  450. puts ((iface == CISTPL_IDE_INTERFACE) ? " IDE" : " unknown");
  451. puts (" interface ");
  452. break;
  453. }
  454. case CISTPL_FUNCE_IDE_MASTER:
  455. case CISTPL_FUNCE_IDE_SLAVE:
  456. {
  457. uchar f1 = *(p+2);
  458. uchar f2 = *(p+4);
  459. puts((f1 & CISTPL_IDE_SILICON) ? " [silicon]" : " [rotating]");
  460. if (f1 & CISTPL_IDE_UNIQUE) {
  461. puts(" [unique]");
  462. }
  463. puts((f1 & CISTPL_IDE_DUAL) ? " [dual]" : " [single]");
  464. if (f2 & CISTPL_IDE_HAS_SLEEP) {
  465. puts(" [sleep]");
  466. }
  467. if (f2 & CISTPL_IDE_HAS_STANDBY) {
  468. puts(" [standby]");
  469. }
  470. if (f2 & CISTPL_IDE_HAS_IDLE) {
  471. puts(" [idle]");
  472. }
  473. if (f2 & CISTPL_IDE_LOW_POWER) {
  474. puts(" [low power]");
  475. }
  476. if (f2 & CISTPL_IDE_REG_INHIBIT) {
  477. puts(" [reg inhibit]");
  478. }
  479. if (f2 & CISTPL_IDE_HAS_INDEX) {
  480. puts(" [index]");
  481. }
  482. if (f2 & CISTPL_IDE_IOIS16) {
  483. puts(" [IOis16]");
  484. }
  485. break;
  486. }
  487. }
  488. putc('\n');
  489. }
  490. /* ------------------------------------------------------------------------- */
  491. #define MAX_IDENT_CHARS 64
  492. #define MAX_IDENT_FIELDS 4
  493. static uchar *known_cards[] = {
  494. "ARGOSY PnPIDE D5",
  495. NULL
  496. };
  497. static int identify(volatile uchar *p)
  498. {
  499. uchar id_str[MAX_IDENT_CHARS];
  500. uchar data;
  501. uchar *t;
  502. uchar **card;
  503. int i, done;
  504. if (p == NULL)
  505. return (0); /* Don't know */
  506. t = id_str;
  507. done =0;
  508. for (i=0; i<=4 && !done; ++i, p+=2) {
  509. while ((data = *p) != '\0') {
  510. if (data == 0xFF) {
  511. done = 1;
  512. break;
  513. }
  514. *t++ = data;
  515. if (t == &id_str[MAX_IDENT_CHARS-1]) {
  516. done = 1;
  517. break;
  518. }
  519. p += 2;
  520. }
  521. if (!done)
  522. *t++ = ' ';
  523. }
  524. *t = '\0';
  525. while (--t > id_str) {
  526. if (*t == ' ') {
  527. *t = '\0';
  528. } else {
  529. break;
  530. }
  531. }
  532. puts(id_str);
  533. putc('\n');
  534. for (card=known_cards; *card; ++card) {
  535. debug ("## Compare against \"%s\"\n", *card);
  536. if (strcmp(*card, id_str) == 0) { /* found! */
  537. debug ("## CARD FOUND ##\n");
  538. return 1;
  539. }
  540. }
  541. return 0; /* don't know */
  542. }
  543. #endif /* CONFIG_IDE_TI_CARDBUS */