misc.c 17 KB

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  1. /*
  2. * (C) Copyright 2002 ELTEC Elektronik AG
  3. * Frank Gottschling <fgottschling@eltec.de>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /* includes */
  24. #include <common.h>
  25. #include <linux/ctype.h>
  26. #include <pci.h>
  27. #include <net.h>
  28. #include <mpc106.h>
  29. #include <w83c553f.h>
  30. #include "srom.h"
  31. /* imports */
  32. extern char console_buffer[CFG_CBSIZE];
  33. extern int l2_cache_enable (int l2control);
  34. extern void *nvram_read (void *dest, const short src, size_t count);
  35. extern void nvram_write (short dest, const void *src, size_t count);
  36. /* globals */
  37. unsigned int ata_reset_time = 60;
  38. unsigned int scsi_reset_time = 10;
  39. unsigned int eltec_board;
  40. /* BAB750 uses SYM53C875(default) and BAB740 uses SYM53C860
  41. * values fixed after board identification
  42. */
  43. unsigned short scsi_dev_id = PCI_DEVICE_ID_NCR_53C875;
  44. unsigned int scsi_max_scsi_id = 15;
  45. unsigned char scsi_sym53c8xx_ccf = 0x13;
  46. /*----------------------------------------------------------------------------*/
  47. /*
  48. * handle sroms on BAB740/750
  49. * fix ether address
  50. * L2 cache initialization
  51. * ide dma control
  52. */
  53. int misc_init_r (void)
  54. {
  55. revinfo eerev;
  56. char *ptr;
  57. u_int i, l, initSrom, copyNv;
  58. char buf[256];
  59. char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
  60. 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 };
  61. pci_dev_t bdf;
  62. char sromSYM[] = {
  63. #ifdef TULIP_BUG
  64. /* 10BaseT, 100BaseTx no full duplex modes */
  65. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  66. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  67. 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
  68. 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
  69. 0x02, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
  70. 0x88, 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61,
  71. 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  72. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  73. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  74. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  75. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  76. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  77. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  78. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  79. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  80. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xe8
  81. #endif
  82. /* 10BaseT, 10BaseT-FD, 100BaseTx, 100BaseTx-FD */
  83. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  84. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  85. 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
  86. 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
  87. 0x04, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
  88. 0x86, 0x02, 0x04, 0xaf, 0x08, 0xa5, 0x00, 0x88,
  89. 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61, 0x80,
  90. 0x88, 0x04, 0x05, 0x27, 0x08, 0x25, 0x00, 0x61,
  91. 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  92. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  93. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  94. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  95. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  96. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  97. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  98. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x77
  99. };
  100. char sromMII[] = {
  101. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  102. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  103. 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x5b, 0x00,
  104. 0x2e, 0x4d, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
  105. 0x01, 0x95, 0x03, 0x00, 0x00, 0x04, 0x01, 0x08,
  106. 0x00, 0x00, 0x02, 0x08, 0x02, 0x00, 0x00, 0x78,
  107. 0xe0, 0x01, 0x00, 0x50, 0x00, 0x18, 0x80, 0x00,
  108. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  109. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  110. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  111. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  112. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  113. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  114. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  115. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  116. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x41
  117. };
  118. /*
  119. * Check/Remake revision info
  120. */
  121. initSrom = 0;
  122. copyNv = 0;
  123. /* read out current revision srom contens */
  124. el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo),
  125. SECOND_DEVICE, FIRST_BLOCK);
  126. /* read out current nvram shadow image */
  127. nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE);
  128. if (strcmp (eerev.magic, "ELTEC") != 0)
  129. {
  130. /* srom is not initialized -> create a default revision info */
  131. for (i = 0, ptr = (char *)&eerev; i < sizeof(revinfo); i++)
  132. *ptr++ = 0x00;
  133. strcpy(eerev.magic, "ELTEC");
  134. eerev.revrev[0] = 1;
  135. eerev.revrev[1] = 0;
  136. eerev.size = 0x00E0;
  137. eerev.category[0] = 0x01;
  138. /* node id from dead e128 as default */
  139. eerev.etheraddr[0] = 0x00;
  140. eerev.etheraddr[1] = 0x00;
  141. eerev.etheraddr[2] = 0x5B;
  142. eerev.etheraddr[3] = 0x00;
  143. eerev.etheraddr[4] = 0x2E;
  144. eerev.etheraddr[5] = 0x4D;
  145. /* cache config word for bab750 */
  146. *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
  147. initSrom = 1; /* force dialog */
  148. copyNv = 1; /* copy to nvram */
  149. }
  150. if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CFG_SROM_SIZE) !=
  151. el_srom_checksum((u_char*)buf, CFG_SROM_SIZE)))
  152. {
  153. printf ("Invalid revision info copy in nvram !\n");
  154. printf ("Press key:\n <c> to copy current revision info to nvram.\n");
  155. printf (" <r> to reenter revision info.\n");
  156. printf ("=> ");
  157. if (0 != readline (NULL))
  158. {
  159. switch ((char)toupper(console_buffer[0]))
  160. {
  161. case 'C':
  162. copyNv = 1;
  163. break;
  164. case 'R':
  165. copyNv = 1;
  166. initSrom = 1;
  167. break;
  168. }
  169. }
  170. }
  171. if (initSrom)
  172. {
  173. memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */
  174. printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]);
  175. if (0 != readline (NULL))
  176. {
  177. eerev.revision[0][0] = (char)toupper(console_buffer[0]);
  178. memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */
  179. }
  180. printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]);
  181. if (1 == readline (NULL))
  182. {
  183. eerev.revision[0][1] = (char)toupper(console_buffer[0]);
  184. }
  185. printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board);
  186. if (11 == readline (NULL))
  187. {
  188. for (i=0; i<11; i++)
  189. eerev.board[i] = (char)toupper(console_buffer[i]);
  190. eerev.board[11] = '\0';
  191. }
  192. printf ("Enter serial number: %s ", (char *)&eerev.serial );
  193. if (6 == readline (NULL))
  194. {
  195. for (i=0; i<6; i++)
  196. eerev.serial[i] = console_buffer[i];
  197. eerev.serial[6] = '\0';
  198. }
  199. printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ",
  200. eerev.etheraddr[0], eerev.etheraddr[1],
  201. eerev.etheraddr[2], eerev.etheraddr[3],
  202. eerev.etheraddr[4], eerev.etheraddr[5]);
  203. if (12 == readline (NULL))
  204. {
  205. for (i=0; i<12; i+=2)
  206. eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] +
  207. hex[toupper(console_buffer[i+1])-'0']);
  208. }
  209. l = strlen ((char *)&eerev.text);
  210. printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text );
  211. if (0 != readline (NULL))
  212. {
  213. for (i = l; i<63; i++)
  214. eerev.text[i] = console_buffer[i-l];
  215. eerev.text[63] = '\0';
  216. }
  217. if (strstr ((char *)&eerev.board, "75") != NULL)
  218. eltec_board = 750;
  219. else
  220. eltec_board = 740;
  221. if (eltec_board == 750)
  222. {
  223. if (CPU_TYPE == CPU_TYPE_750)
  224. *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
  225. else
  226. *(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH;
  227. printf("Enter L2Cache config word with leading zero (HEX): %08X ",
  228. *(int*)&eerev.res[0] );
  229. if (0 != readline (NULL))
  230. {
  231. for (i=0; i<7; i+=2)
  232. {
  233. eerev.res[i>>1] =
  234. (char)(16*hex[toupper(console_buffer[i])-'0'] +
  235. hex[toupper(console_buffer[i+1])-'0']);
  236. }
  237. }
  238. /* prepare network eeprom */
  239. sromMII[20] = eerev.etheraddr[0];
  240. sromMII[21] = eerev.etheraddr[1];
  241. sromMII[22] = eerev.etheraddr[2];
  242. sromMII[23] = eerev.etheraddr[3];
  243. sromMII[24] = eerev.etheraddr[4];
  244. sromMII[25] = eerev.etheraddr[5];
  245. printf("\nSRom: Writing DEC21143 MII info .. ");
  246. if (dc_srom_store ((u_short *)sromMII) == -1)
  247. printf("FAILED\n");
  248. else
  249. printf("OK\n");
  250. }
  251. if (eltec_board == 740)
  252. {
  253. *(int *)&eerev.res[0] = 0;
  254. sromSYM[20] = eerev.etheraddr[0];
  255. sromSYM[21] = eerev.etheraddr[1];
  256. sromSYM[22] = eerev.etheraddr[2];
  257. sromSYM[23] = eerev.etheraddr[3];
  258. sromSYM[24] = eerev.etheraddr[4];
  259. sromSYM[25] = eerev.etheraddr[5];
  260. printf("\nSRom: Writing DEC21143 SYM info .. ");
  261. if (dc_srom_store ((u_short *)sromSYM) == -1)
  262. printf("FAILED\n");
  263. else
  264. printf("OK\n");
  265. }
  266. /* update CRC */
  267. eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);
  268. /* write new values */
  269. printf("\nSRom: Writing revision info ...... ");
  270. if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
  271. sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
  272. printf("FAILED\n\n");
  273. else
  274. printf("OK\n\n");
  275. /* write new values as shadow image to nvram */
  276. nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);
  277. } /*if (initSrom) */
  278. /* copy current values as shadow image to nvram */
  279. if (initSrom == 0 && copyNv == 1)
  280. nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);
  281. /* update environment */
  282. sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
  283. eerev.etheraddr[0], eerev.etheraddr[1],
  284. eerev.etheraddr[2], eerev.etheraddr[3],
  285. eerev.etheraddr[4], eerev.etheraddr[5]);
  286. setenv ("ethaddr", buf);
  287. /* print actual board identification */
  288. printf("Ident: %s Ser %s Rev %c%c\n",
  289. eerev.board, (char *)&eerev.serial,
  290. eerev.revision[0][0], eerev.revision[0][1]);
  291. /* global board ident */
  292. if (strstr ((char *)&eerev.board, "75") != NULL)
  293. eltec_board = 750;
  294. else
  295. eltec_board = 740;
  296. /*
  297. * L2 cache configuration
  298. */
  299. #if defined(CFG_L2_BAB7xx)
  300. ptr = getenv("l2cache");
  301. if (*ptr == '0')
  302. {
  303. printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
  304. }
  305. else
  306. {
  307. printf ("Cache: L2 activated on BAB%d\n", eltec_board);
  308. l2_cache_enable(*(int*)&eerev.res[0]);
  309. }
  310. #endif
  311. /*
  312. * Reconfig ata reset timeout from environment
  313. */
  314. if ((ptr = getenv ("ata_reset_time")) != NULL)
  315. {
  316. ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
  317. }
  318. else
  319. {
  320. sprintf (buf, "%d", ata_reset_time);
  321. setenv ("ata_reset_time", buf);
  322. }
  323. /*
  324. * Reconfig scsi reset timeout from environment
  325. */
  326. if ((ptr = getenv ("scsi_reset_time")) != NULL)
  327. {
  328. scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
  329. }
  330. else
  331. {
  332. sprintf (buf, "%d", scsi_reset_time);
  333. setenv ("scsi_reset_time", buf);
  334. }
  335. if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
  336. {
  337. if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
  338. {
  339. /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 Mhz */
  340. scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
  341. scsi_max_scsi_id = 7;
  342. scsi_sym53c8xx_ccf = 0x15;
  343. pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
  344. }
  345. if ((ptr = getenv ("ide_dma_off")) != NULL)
  346. {
  347. u_long dma_off = simple_strtoul (ptr, NULL, 10);
  348. /*
  349. * setup user defined registers
  350. * s.a. linux/drivers/ide/sl82c105.c
  351. */
  352. bdf |= PCI_BDF(0,0,1); /* ide user reg at bdf function 1 */
  353. if (dma_off & 1)
  354. {
  355. pci_write_config_byte (bdf, 0x46, 1);
  356. printf("IDE: DMA off flag set: Bus 0 : Dev 0\n");
  357. }
  358. if (dma_off & 2)
  359. {
  360. pci_write_config_byte (bdf, 0x4a, 1);
  361. printf("IDE: DMA off flag set: Bus 0 : Dev 1\n");
  362. }
  363. if (dma_off & 4)
  364. {
  365. pci_write_config_byte (bdf, 0x4e, 1);
  366. printf("IDE: DMA off flag set: Bus 1 : Dev 0\n");
  367. }
  368. if (dma_off & 8)
  369. {
  370. pci_write_config_byte (bdf, 0x52, 1);
  371. printf("IDE: DMA off flag set: Bus 1 : Dev 1\n");
  372. }
  373. }
  374. }
  375. return (0);
  376. }
  377. /*----------------------------------------------------------------------------*/
  378. /*
  379. * BAB740 uses KENDIN KS8761 modem chip with not common setup values
  380. */
  381. #ifdef CONFIG_TULIP_SELECT_MEDIA
  382. /* Register bits.
  383. */
  384. #define BMR_SWR 0x00000001 /* Software Reset */
  385. #define STS_TS 0x00700000 /* Transmit Process State */
  386. #define STS_RS 0x000e0000 /* Receive Process State */
  387. #define OMR_ST 0x00002000 /* Start/Stop Transmission Command */
  388. #define OMR_SR 0x00000002 /* Start/Stop Receive */
  389. #define OMR_PS 0x00040000 /* Port Select */
  390. #define OMR_SDP 0x02000000 /* SD Polarity - MUST BE ASSERTED */
  391. #define OMR_PM 0x00000080 /* Pass All Multicast */
  392. #define OMR_PR 0x00000040 /* Promiscuous Mode */
  393. #define OMR_PCS 0x00800000 /* PCS Function */
  394. #define OMR_TTM 0x00400000 /* Transmit Threshold Mode */
  395. /* Ethernet chip registers.
  396. */
  397. #define DE4X5_BMR 0x000 /* Bus Mode Register */
  398. #define DE4X5_TPD 0x008 /* Transmit Poll Demand Reg */
  399. #define DE4X5_RRBA 0x018 /* RX Ring Base Address Reg */
  400. #define DE4X5_TRBA 0x020 /* TX Ring Base Address Reg */
  401. #define DE4X5_STS 0x028 /* Status Register */
  402. #define DE4X5_OMR 0x030 /* Operation Mode Register */
  403. #define DE4X5_SISR 0x060 /* SIA Status Register */
  404. #define DE4X5_SICR 0x068 /* SIA Connectivity Register */
  405. #define DE4X5_TXRX 0x070 /* SIA Transmit and Receive Register */
  406. #define DE4X5_GPPR 0x078 /* General Purpose Port register */
  407. #define DE4X5_APROM 0x048 /* Ethernet Address PROM */
  408. /*----------------------------------------------------------------------------*/
  409. static int INL(struct eth_device* dev, u_long addr)
  410. {
  411. return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
  412. }
  413. /*----------------------------------------------------------------------------*/
  414. static void OUTL(struct eth_device* dev, int command, u_long addr)
  415. {
  416. *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
  417. }
  418. /*----------------------------------------------------------------------------*/
  419. static void media_reg_init (
  420. struct eth_device* dev,
  421. u32 csr14,
  422. u32 csr15_dir,
  423. u32 csr15_v0,
  424. u32 csr15_v1,
  425. u32 csr6 )
  426. {
  427. OUTL(dev, 0, DE4X5_OMR); /* CSR6 */
  428. udelay(10 * 1000);
  429. OUTL(dev, 0, DE4X5_SICR); /* CSR13 */
  430. OUTL(dev, 1, DE4X5_SICR); /* CSR13 */
  431. udelay(10 * 1000);
  432. OUTL(dev, csr14, DE4X5_TXRX); /* CSR14 */
  433. OUTL(dev, csr15_dir, DE4X5_GPPR); /* CSR15 */
  434. OUTL(dev, csr15_v0, DE4X5_GPPR); /* CSR15 */
  435. udelay(10 * 1000);
  436. OUTL(dev, csr15_v1, DE4X5_GPPR); /* CSR15 */
  437. OUTL(dev, 0x00000301, DE4X5_SISR); /* CSR12 */
  438. OUTL(dev, csr6, DE4X5_OMR); /* CSR6 */
  439. }
  440. /*----------------------------------------------------------------------------*/
  441. void dc21x4x_select_media(struct eth_device* dev)
  442. {
  443. int i, status, ext;
  444. extern unsigned int eltec_board;
  445. if (eltec_board == 740)
  446. {
  447. printf("SYM media select "); /* BAB740 */
  448. /* start autoneg. with 10 mbit */
  449. media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
  450. ext = status = 0;
  451. for (i=0; i<2000+ext; i++)
  452. {
  453. status = INL(dev, DE4X5_SISR);
  454. udelay(1000);
  455. if (status & 0x2000) ext = 2000;
  456. if ((status & 0x7000) == 0x5000) break;
  457. }
  458. /* autoneg. ok -> 100MB FD */
  459. if ((status & 0x0100f000) == 0x0100d000)
  460. {
  461. media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
  462. printf("100baseTx-FD\n");
  463. }
  464. /* autoneg. ok -> 100MB HD */
  465. else if ((status & 0x0080f000) == 0x0080d000)
  466. {
  467. media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
  468. printf("100baseTx\n");
  469. }
  470. /* autoneg. ok -> 10MB FD */
  471. else if ((status & 0x0040f000) == 0x0040d000)
  472. {
  473. media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
  474. printf("10baseT-FD\n");
  475. }
  476. /* autoneg. fail -> 10MB HD */
  477. else
  478. {
  479. media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
  480. (OMR_SDP | OMR_TTM | OMR_PM));
  481. printf("10baseT\n");
  482. }
  483. }
  484. else
  485. {
  486. printf("MII media selected\n"); /* BAB750 */
  487. OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); /* CSR6 */
  488. }
  489. }
  490. #endif /* CONFIG_TULIP_SELECT_MEDIA */
  491. /*---------------------------------------------------------------------------*/