zeus.c 11 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <malloc.h>
  26. #include <environment.h>
  27. #include <logbuff.h>
  28. #include <post.h>
  29. #include <asm/processor.h>
  30. #include <asm/io.h>
  31. #include <asm/gpio.h>
  32. DECLARE_GLOBAL_DATA_PTR;
  33. #define REBOOT_MAGIC 0x07081967
  34. #define REBOOT_NOP 0x00000000
  35. #define REBOOT_DO_POST 0x00000001
  36. extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  37. extern env_t *env_ptr;
  38. extern uchar default_environment[];
  39. ulong flash_get_size(ulong base, int banknum);
  40. void env_crc_update(void);
  41. int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  42. static u32 start_time;
  43. int board_early_init_f(void)
  44. {
  45. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  46. mtdcr(uicer, 0x00000000); /* disable all ints */
  47. mtdcr(uiccr, 0x00000000);
  48. mtdcr(uicpr, 0xFFFF7F00); /* set int polarities */
  49. mtdcr(uictr, 0x00000000); /* set int trigger levels */
  50. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  51. mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
  52. /*
  53. * Configure CPC0_PCI to enable PerWE as output
  54. */
  55. mtdcr(cpc0_pci, CPC0_PCI_SPE);
  56. return 0;
  57. }
  58. int misc_init_r(void)
  59. {
  60. u32 pbcr;
  61. int size_val = 0;
  62. u32 post_magic;
  63. u32 post_val;
  64. post_magic = in_be32((void *)CFG_POST_MAGIC);
  65. post_val = in_be32((void *)CFG_POST_VAL);
  66. if ((post_magic == REBOOT_MAGIC) && (post_val == REBOOT_DO_POST)) {
  67. /*
  68. * Set special bootline bootparameter to pass this POST boot
  69. * mode to Linux to reset the username/password
  70. */
  71. setenv("addmisc", "setenv bootargs \\${bootargs} factory_reset=yes");
  72. /*
  73. * Normally don't run POST tests, only when enabled
  74. * via the sw-reset button. So disable further tests
  75. * upon next bootup here.
  76. */
  77. out_be32((void *)CFG_POST_VAL, REBOOT_NOP);
  78. } else {
  79. /*
  80. * Only run POST when initiated via the sw-reset button mechanism
  81. */
  82. post_word_store(0);
  83. }
  84. /*
  85. * Get current time
  86. */
  87. start_time = get_timer(0);
  88. /*
  89. * FLASH stuff...
  90. */
  91. /* Re-do sizing to get full correct info */
  92. /* adjust flash start and offset */
  93. mfebc(pb0cr, pbcr);
  94. switch (gd->bd->bi_flashsize) {
  95. case 1 << 20:
  96. size_val = 0;
  97. break;
  98. case 2 << 20:
  99. size_val = 1;
  100. break;
  101. case 4 << 20:
  102. size_val = 2;
  103. break;
  104. case 8 << 20:
  105. size_val = 3;
  106. break;
  107. case 16 << 20:
  108. size_val = 4;
  109. break;
  110. case 32 << 20:
  111. size_val = 5;
  112. break;
  113. case 64 << 20:
  114. size_val = 6;
  115. break;
  116. case 128 << 20:
  117. size_val = 7;
  118. break;
  119. }
  120. pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
  121. mtebc(pb0cr, pbcr);
  122. /*
  123. * Re-check to get correct base address
  124. */
  125. flash_get_size(gd->bd->bi_flashstart, 0);
  126. /* Monitor protection ON by default */
  127. (void)flash_protect(FLAG_PROTECT_SET,
  128. -CFG_MONITOR_LEN,
  129. 0xffffffff,
  130. &flash_info[0]);
  131. /* Env protection ON by default */
  132. (void)flash_protect(FLAG_PROTECT_SET,
  133. CFG_ENV_ADDR_REDUND,
  134. CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
  135. &flash_info[0]);
  136. return 0;
  137. }
  138. /*
  139. * Check Board Identity:
  140. */
  141. int checkboard(void)
  142. {
  143. char *s = getenv("serial#");
  144. puts("Board: Zeus-");
  145. if (in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_ZEUS_PE))
  146. puts("PE");
  147. else
  148. puts("CE");
  149. puts(" of BulletEndPoint");
  150. if (s != NULL) {
  151. puts(", serial# ");
  152. puts(s);
  153. }
  154. putc('\n');
  155. /* both LED's off */
  156. gpio_write_bit(CFG_GPIO_LED_RED, 0);
  157. gpio_write_bit(CFG_GPIO_LED_GREEN, 0);
  158. udelay(10000);
  159. /* and on again */
  160. gpio_write_bit(CFG_GPIO_LED_RED, 1);
  161. gpio_write_bit(CFG_GPIO_LED_GREEN, 1);
  162. return (0);
  163. }
  164. static u32 detect_sdram_size(void)
  165. {
  166. u32 val;
  167. u32 size;
  168. mfsdram(mem_mb0cf, val);
  169. size = (4 << 20) << ((val & 0x000e0000) >> 17);
  170. /*
  171. * Check if 2nd bank is enabled too
  172. */
  173. mfsdram(mem_mb1cf, val);
  174. if (val & 1)
  175. size += (4 << 20) << ((val & 0x000e0000) >> 17);
  176. return size;
  177. }
  178. long int initdram (int board_type)
  179. {
  180. return detect_sdram_size();
  181. }
  182. #if defined(CFG_DRAM_TEST)
  183. int testdram(void)
  184. {
  185. unsigned long *mem = (unsigned long *)0;
  186. const unsigned long kend = (1024 / sizeof(unsigned long));
  187. unsigned long k, n;
  188. unsigned long msr;
  189. unsigned long total_kbytes;
  190. total_kbytes = detect_sdram_size();
  191. msr = mfmsr();
  192. mtmsr(msr & ~(MSR_EE));
  193. for (k = 0; k < total_kbytes ;
  194. ++k, mem += (1024 / sizeof(unsigned long))) {
  195. if ((k & 1023) == 0) {
  196. printf("%3d MB\r", k / 1024);
  197. }
  198. memset(mem, 0xaaaaaaaa, 1024);
  199. for (n = 0; n < kend; ++n) {
  200. if (mem[n] != 0xaaaaaaaa) {
  201. printf("SDRAM test fails at: %08x\n",
  202. (uint) & mem[n]);
  203. return 1;
  204. }
  205. }
  206. memset(mem, 0x55555555, 1024);
  207. for (n = 0; n < kend; ++n) {
  208. if (mem[n] != 0x55555555) {
  209. printf("SDRAM test fails at: %08x\n",
  210. (uint) & mem[n]);
  211. return 1;
  212. }
  213. }
  214. }
  215. printf("SDRAM test passes\n");
  216. mtmsr(msr);
  217. return 0;
  218. }
  219. #endif
  220. static int default_env_var(char *buf, char *var)
  221. {
  222. char *ptr;
  223. char *val;
  224. /*
  225. * Find env variable
  226. */
  227. ptr = strstr(buf + 4, var);
  228. if (ptr == NULL) {
  229. printf("ERROR: %s not found!\n", var);
  230. return -1;
  231. }
  232. ptr += strlen(var) + 1;
  233. /*
  234. * Now the ethaddr needs to be updated in the "normal"
  235. * environment storage -> redundant flash.
  236. */
  237. val = ptr;
  238. setenv(var, val);
  239. printf("Updated %s from eeprom to %s!\n", var, val);
  240. return 0;
  241. }
  242. static int restore_default(void)
  243. {
  244. char *buf;
  245. char *buf_save;
  246. u32 crc;
  247. /*
  248. * Unprotect and erase environment area
  249. */
  250. flash_protect(FLAG_PROTECT_CLEAR,
  251. CFG_ENV_ADDR_REDUND,
  252. CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
  253. &flash_info[0]);
  254. flash_sect_erase(CFG_ENV_ADDR_REDUND,
  255. CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1);
  256. /*
  257. * Now restore default environment from U-Boot image
  258. * -> ipaddr, serverip...
  259. */
  260. memset(env_ptr, 0, sizeof(env_t));
  261. memcpy(env_ptr->data, default_environment, ENV_SIZE);
  262. #ifdef CFG_REDUNDAND_ENVIRONMENT
  263. env_ptr->flags = 0xFF;
  264. #endif
  265. env_crc_update();
  266. gd->env_valid = 1;
  267. /*
  268. * Read board specific values from I2C EEPROM
  269. * and set env variables accordingly
  270. * -> ethaddr, eth1addr, serial#
  271. */
  272. buf = buf_save = malloc(FACTORY_RESET_ENV_SIZE);
  273. if (eeprom_read(FACTORY_RESET_I2C_EEPROM, FACTORY_RESET_ENV_OFFS,
  274. (u8 *)buf, FACTORY_RESET_ENV_SIZE)) {
  275. puts("\nError reading EEPROM!\n");
  276. } else {
  277. crc = crc32(0, (u8 *)(buf + 4), FACTORY_RESET_ENV_SIZE - 4);
  278. if (crc != *(u32 *)buf) {
  279. printf("ERROR: crc mismatch %08lx %08lx\n", crc, *(u32 *)buf);
  280. return -1;
  281. }
  282. default_env_var(buf, "ethaddr");
  283. buf += 8 + 18;
  284. default_env_var(buf, "eth1addr");
  285. buf += 9 + 18;
  286. default_env_var(buf, "serial#");
  287. }
  288. /*
  289. * Finally save updated env variables back to flash
  290. */
  291. saveenv();
  292. free(buf_save);
  293. return 0;
  294. }
  295. int do_set_default(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  296. {
  297. char *buf;
  298. char *buf_save;
  299. char str[32];
  300. u32 crc;
  301. char var[32];
  302. if (argc < 4) {
  303. puts("ERROR!\n");
  304. return -1;
  305. }
  306. buf = buf_save = malloc(FACTORY_RESET_ENV_SIZE);
  307. memset(buf, 0, FACTORY_RESET_ENV_SIZE);
  308. strcpy(var, "ethaddr");
  309. printf("Setting %s to %s\n", var, argv[1]);
  310. sprintf(str, "%s=%s", var, argv[1]);
  311. strcpy(buf + 4, str);
  312. buf += strlen(str) + 1;
  313. strcpy(var, "eth1addr");
  314. printf("Setting %s to %s\n", var, argv[2]);
  315. sprintf(str, "%s=%s", var, argv[2]);
  316. strcpy(buf + 4, str);
  317. buf += strlen(str) + 1;
  318. strcpy(var, "serial#");
  319. printf("Setting %s to %s\n", var, argv[3]);
  320. sprintf(str, "%s=%s", var, argv[3]);
  321. strcpy(buf + 4, str);
  322. crc = crc32(0, (u8 *)(buf_save + 4), FACTORY_RESET_ENV_SIZE - 4);
  323. *(u32 *)buf_save = crc;
  324. if (eeprom_write(FACTORY_RESET_I2C_EEPROM, FACTORY_RESET_ENV_OFFS,
  325. (u8 *)buf_save, FACTORY_RESET_ENV_SIZE)) {
  326. puts("\nError writing EEPROM!\n");
  327. return -1;
  328. }
  329. free(buf_save);
  330. return 0;
  331. }
  332. U_BOOT_CMD(
  333. setdef, 4, 1, do_set_default,
  334. "setdef - write board-specific values to EEPROM (ethaddr...)\n",
  335. "ethaddr eth1addr serial#\n - write board-specific values to EEPROM\n"
  336. );
  337. static inline int sw_reset_pressed(void)
  338. {
  339. return !(in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_SW_RESET));
  340. }
  341. int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[])
  342. {
  343. int delta;
  344. int count = 0;
  345. int post = 0;
  346. int factory_reset = 0;
  347. if (!sw_reset_pressed()) {
  348. printf("SW-Reset already high (Button released)\n");
  349. printf("-> No action taken!\n");
  350. return 0;
  351. }
  352. printf("Waiting for SW-Reset button to be released.");
  353. while (1) {
  354. delta = get_timer(start_time);
  355. if (!sw_reset_pressed())
  356. break;
  357. if ((delta > CFG_TIME_POST) && !post) {
  358. printf("\nWhen released now, POST tests will be started.");
  359. gpio_write_bit(CFG_GPIO_LED_GREEN, 0);
  360. post = 1;
  361. }
  362. if ((delta > CFG_TIME_FACTORY_RESET) && !factory_reset) {
  363. printf("\nWhen released now, factory default values"
  364. " will be restored.");
  365. gpio_write_bit(CFG_GPIO_LED_RED, 0);
  366. factory_reset = 1;
  367. }
  368. udelay(1000);
  369. if (!(count++ % 1000))
  370. printf(".");
  371. }
  372. printf("\nSW-Reset Button released after %d milli-seconds!\n", delta);
  373. if (delta > CFG_TIME_FACTORY_RESET) {
  374. printf("Starting factory reset value restoration...\n");
  375. /*
  376. * Restore default setting
  377. */
  378. restore_default();
  379. /*
  380. * Reset the board for default to become valid
  381. */
  382. do_reset(NULL, 0, 0, NULL);
  383. return 0;
  384. }
  385. if (delta > CFG_TIME_POST) {
  386. printf("Starting POST configuration...\n");
  387. /*
  388. * Enable POST upon next bootup
  389. */
  390. out_be32((void *)CFG_POST_MAGIC, REBOOT_MAGIC);
  391. out_be32((void *)CFG_POST_VAL, REBOOT_DO_POST);
  392. post_bootmode_init();
  393. /*
  394. * Reset the logbuffer for a clean start
  395. */
  396. logbuff_reset();
  397. do_reset(NULL, 0, 0, NULL);
  398. return 0;
  399. }
  400. return 0;
  401. }
  402. U_BOOT_CMD (
  403. chkreset, 1, 1, do_chkreset,
  404. "chkreset- Check for status of SW-reset button and act accordingly\n",
  405. NULL
  406. );
  407. #if defined(CONFIG_POST)
  408. /*
  409. * Returns 1 if keys pressed to start the power-on long-running tests
  410. * Called from board_init_f().
  411. */
  412. int post_hotkeys_pressed(void)
  413. {
  414. u32 post_magic;
  415. u32 post_val;
  416. post_magic = in_be32((void *)CFG_POST_MAGIC);
  417. post_val = in_be32((void *)CFG_POST_VAL);
  418. if ((post_magic == REBOOT_MAGIC) && (post_val == REBOOT_DO_POST))
  419. return 1;
  420. else
  421. return 0;
  422. }
  423. #endif /* CONFIG_POST */