bcsr.h 2.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182
  1. /*
  2. * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __BCSR_H_
  23. #define __BCSR_H_
  24. #include <common.h>
  25. /* BCSR Bit definitions*/
  26. /****************************************/
  27. /* BCSR defines */
  28. /****************************************/
  29. #define BCSR6_UPC1_EN 0x80
  30. #define BCSR6_UPC1_POS_EN 0x40
  31. #define BCSR6_UPC1_ADDR_EN 0x20
  32. #define BCSR6_UPC1_DEV2 0x10
  33. #define BCSR6_SD_ENABLE 0x04
  34. #define BCSR6_TDM2G_EN 0x02
  35. #define BCSR6_UCC7_RMII_EN 0x01
  36. #define BCSR7_UCC1_GETH_EN 0x80
  37. #define BCSR7_UCC1_RGMII_EN 0x40
  38. #define BCSR7_UCC1_RTBI_EN 0x20
  39. #define BCSR7_GETHRST_MRVL 0x04
  40. #define BCSR7_BRD_WRT_PROTECT 0x02
  41. #define BCSR8_UCC2_GETH_EN 0x80
  42. #define BCSR8_UCC2_RGMII_EN 0x40
  43. #define BCSR8_UCC2_RTBI_EN 0x20
  44. #define BCSR8_UEM_MARVEL_RESET 0x02
  45. #define BCSR9_UCC3_GETH_EN 0x80
  46. #define BCSR9_UCC3_RGMII_EN 0x40
  47. #define BCSR9_UCC3_RTBI_EN 0x20
  48. #define BCSR9_UCC3_RMII_EN 0x10
  49. #define BCSR9_UCC3_UEM_MICREL 0x01
  50. #define BCSR10_UCC4_GETH_EN 0x80
  51. #define BCSR10_UCC4_RGMII_EN 0x40
  52. #define BCSR10_UCC4_RTBI_EN 0x20
  53. #define BCSR11_LED0 0x40
  54. #define BCSR11_LED1 0x20
  55. #define BCSR11_LED2 0x10
  56. #define BCSR12_UCC6_RMII_EN 0x20
  57. #define BCSR12_UCC8_RMII_EN 0x20
  58. #define BCSR15_SMII6_DIS 0x08
  59. #define BCSR15_SMII8_DIS 0x04
  60. #define BCSR16_UPC1_DEV2 0x02
  61. #define BCSR17_FLASH_nWP 0x01
  62. /*BCSR Utils functions*/
  63. void enable_8569mds_flash_write(void);
  64. void disable_8569mds_flash_write(void);
  65. void enable_8569mds_qe_mdio(void);
  66. void disable_8569mds_brd_eeprom_write_protect(void);
  67. #endif /* __BCSR_H_ */