mp.c 2.0 KB

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  1. #include <common.h>
  2. #include <asm/processor.h>
  3. #include <asm/mmu.h>
  4. #include <ioports.h>
  5. #include <lmb.h>
  6. #include <asm/io.h>
  7. #include <asm/mp.h>
  8. DECLARE_GLOBAL_DATA_PTR;
  9. int cpu_reset(int nr)
  10. {
  11. /* dummy function so common/cmd_mp.c will build
  12. * should be implemented in the future, when cpu_release()
  13. * is supported. Be aware there may be a similiar bug
  14. * as exists on MPC85xx w/its PIC having a timing window
  15. * associated to resetting the core */
  16. return 1;
  17. }
  18. int cpu_status(int nr)
  19. {
  20. /* dummy function so common/cmd_mp.c will build */
  21. return 0;
  22. }
  23. int cpu_release(int nr, int argc, char *argv[])
  24. {
  25. /* dummy function so common/cmd_mp.c will build
  26. * should be implemented in the future */
  27. return 1;
  28. }
  29. u32 determine_mp_bootpg(void)
  30. {
  31. /* if we have 4G or more of memory, put the boot page at 4Gb-1M */
  32. if ((u64)gd->ram_size > 0xfffff000)
  33. return (0xfff00000);
  34. return (gd->ram_size - (1024 * 1024));
  35. }
  36. void cpu_mp_lmb_reserve(struct lmb *lmb)
  37. {
  38. u32 bootpg = determine_mp_bootpg();
  39. /* tell u-boot we stole a page */
  40. lmb_reserve(lmb, bootpg, 4096);
  41. }
  42. /*
  43. * Copy the code for other cpus to execute into an
  44. * aligned location accessible via BPTR
  45. */
  46. void setup_mp(void)
  47. {
  48. extern ulong __secondary_start_page;
  49. ulong fixup = (ulong)&__secondary_start_page;
  50. u32 bootpg = determine_mp_bootpg();
  51. u32 bootpg_va;
  52. if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) {
  53. /* We're not covered by the DDR mapping, set up BAT */
  54. write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K |
  55. BATU_VS | BATU_VP,
  56. bootpg | BATL_PP_RW | BATL_MEMCOHERENCE);
  57. bootpg_va = CONFIG_SYS_SCRATCH_VA;
  58. } else {
  59. bootpg_va = bootpg;
  60. }
  61. memcpy((void *)bootpg_va, (void *)fixup, 4096);
  62. flush_cache(bootpg_va, 4096);
  63. /* remove the temporary BAT mapping */
  64. if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE)
  65. write_bat(DBAT7, 0, 0);
  66. /* If the physical location of bootpg is not at fff00000, set BPTR */
  67. if (bootpg != 0xfff00000)
  68. out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 |
  69. (bootpg >> 12));
  70. }