omap3_beagle.h 10 KB

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  1. /*
  2. * (C) Copyright 2006-2008
  3. * Texas Instruments.
  4. * Richard Woodruff <r-woodruff2@ti.com>
  5. * Syed Mohammed Khasim <x0khasim@ti.com>
  6. *
  7. * Configuration settings for the TI OMAP3530 Beagle board.
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #ifndef __CONFIG_H
  28. #define __CONFIG_H
  29. /*
  30. * High Level Configuration Options
  31. */
  32. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  33. #define CONFIG_OMAP34XX 1 /* which is a 34XX */
  34. #define CONFIG_OMAP3430 1 /* which is in a 3430 */
  35. #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
  36. #define CONFIG_SDRC /* The chip has SDRC controller */
  37. #include <asm/arch/cpu.h> /* get chip and board defs */
  38. #include <asm/arch/omap3.h>
  39. /*
  40. * Display CPU and Board information
  41. */
  42. #define CONFIG_DISPLAY_CPUINFO 1
  43. #define CONFIG_DISPLAY_BOARDINFO 1
  44. /* Clock Defines */
  45. #define V_OSCK 26000000 /* Clock output from T2 */
  46. #define V_SCLK (V_OSCK >> 1)
  47. #undef CONFIG_USE_IRQ /* no support for IRQs */
  48. #define CONFIG_MISC_INIT_R
  49. #define CONFIG_OF_LIBFDT 1
  50. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  51. #define CONFIG_SETUP_MEMORY_TAGS 1
  52. #define CONFIG_INITRD_TAG 1
  53. #define CONFIG_REVISION_TAG 1
  54. /*
  55. * Size of malloc() pool
  56. */
  57. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
  58. /* Sector */
  59. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  60. /*
  61. * Hardware drivers
  62. */
  63. /*
  64. * NS16550 Configuration
  65. */
  66. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  67. #define CONFIG_SYS_NS16550
  68. #define CONFIG_SYS_NS16550_SERIAL
  69. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  70. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  71. /*
  72. * select serial console configuration
  73. */
  74. #define CONFIG_CONS_INDEX 3
  75. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  76. #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
  77. /* allow to overwrite serial and ethaddr */
  78. #define CONFIG_ENV_OVERWRITE
  79. #define CONFIG_BAUDRATE 115200
  80. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  81. 115200}
  82. #define CONFIG_GENERIC_MMC 1
  83. #define CONFIG_MMC 1
  84. #define CONFIG_OMAP_HSMMC 1
  85. #define CONFIG_DOS_PARTITION 1
  86. /* Status LED */
  87. #define CONFIG_STATUS_LED 1
  88. #define CONFIG_BOARD_SPECIFIC_LED 1
  89. #define STATUS_LED_BIT 0x01
  90. #define STATUS_LED_STATE STATUS_LED_ON
  91. #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
  92. #define STATUS_LED_BIT1 0x02
  93. #define STATUS_LED_STATE1 STATUS_LED_ON
  94. #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
  95. #define STATUS_LED_BOOT STATUS_LED_BIT
  96. #define STATUS_LED_GREEN STATUS_LED_BIT1
  97. /* DDR - I use Micron DDR */
  98. #define CONFIG_OMAP3_MICRON_DDR 1
  99. /* USB */
  100. #define CONFIG_MUSB_UDC 1
  101. #define CONFIG_USB_OMAP3 1
  102. #define CONFIG_TWL4030_USB 1
  103. /* USB device configuration */
  104. #define CONFIG_USB_DEVICE 1
  105. #define CONFIG_USB_TTY 1
  106. #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
  107. /* USB EHCI */
  108. #define CONFIG_CMD_USB
  109. #define CONFIG_USB_EHCI
  110. #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  111. /* commands to include */
  112. #include <config_cmd_default.h>
  113. #define CONFIG_CMD_CACHE
  114. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  115. #define CONFIG_CMD_FAT /* FAT support */
  116. #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
  117. #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
  118. #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
  119. #define MTDIDS_DEFAULT "nand0=nand"
  120. #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
  121. "1920k(u-boot),128k(u-boot-env),"\
  122. "4m(kernel),-(fs)"
  123. #define CONFIG_CMD_I2C /* I2C serial bus support */
  124. #define CONFIG_CMD_MMC /* MMC support */
  125. #define CONFIG_USB_STORAGE /* USB storage support */
  126. #define CONFIG_CMD_NAND /* NAND support */
  127. #define CONFIG_CMD_LED /* LED support */
  128. #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
  129. #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
  130. #undef CONFIG_CMD_IMI /* iminfo */
  131. #undef CONFIG_CMD_IMLS /* List all found images */
  132. #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
  133. #undef CONFIG_CMD_NFS /* NFS support */
  134. #define CONFIG_SYS_NO_FLASH
  135. #define CONFIG_HARD_I2C 1
  136. #define CONFIG_SYS_I2C_SPEED 100000
  137. #define CONFIG_SYS_I2C_SLAVE 1
  138. #define CONFIG_SYS_I2C_BUS 0
  139. #define CONFIG_SYS_I2C_BUS_SELECT 1
  140. #define CONFIG_I2C_MULTI_BUS 1
  141. #define CONFIG_DRIVER_OMAP34XX_I2C 1
  142. /*
  143. * TWL4030
  144. */
  145. #define CONFIG_TWL4030_POWER 1
  146. #define CONFIG_TWL4030_LED 1
  147. /*
  148. * Board NAND Info.
  149. */
  150. #define CONFIG_SYS_NAND_QUIET_TEST 1
  151. #define CONFIG_NAND_OMAP_GPMC
  152. #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
  153. /* to access nand */
  154. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  155. /* to access nand at */
  156. /* CS0 */
  157. #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
  158. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
  159. /* devices */
  160. #define CONFIG_JFFS2_NAND
  161. /* nand device jffs2 lives on */
  162. #define CONFIG_JFFS2_DEV "nand0"
  163. /* start of jffs2 partition */
  164. #define CONFIG_JFFS2_PART_OFFSET 0x680000
  165. #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
  166. /* partition */
  167. /* Environment information */
  168. #define CONFIG_BOOTDELAY 10
  169. #define CONFIG_EXTRA_ENV_SETTINGS \
  170. "loadaddr=0x82000000\0" \
  171. "usbtty=cdc_acm\0" \
  172. "console=ttyS2,115200n8\0" \
  173. "mpurate=auto\0" \
  174. "vram=12M\0" \
  175. "dvimode=1024x768MR-16@60\0" \
  176. "defaultdisplay=dvi\0" \
  177. "mmcdev=0\0" \
  178. "mmcroot=/dev/mmcblk0p2 rw\0" \
  179. "mmcrootfstype=ext3 rootwait\0" \
  180. "nandroot=/dev/mtdblock4 rw\0" \
  181. "nandrootfstype=jffs2\0" \
  182. "mmcargs=setenv bootargs console=${console} " \
  183. "mpurate=${mpurate} " \
  184. "vram=${vram} " \
  185. "omapfb.mode=dvi:${dvimode} " \
  186. "omapfb.debug=y " \
  187. "omapdss.def_disp=${defaultdisplay} " \
  188. "root=${mmcroot} " \
  189. "rootfstype=${mmcrootfstype}\0" \
  190. "nandargs=setenv bootargs console=${console} " \
  191. "mpurate=${mpurate} " \
  192. "vram=${vram} " \
  193. "omapfb.mode=dvi:${dvimode} " \
  194. "omapfb.debug=y " \
  195. "omapdss.def_disp=${defaultdisplay} " \
  196. "root=${nandroot} " \
  197. "rootfstype=${nandrootfstype}\0" \
  198. "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
  199. "importbootenv=echo Importing environment from mmc ...; " \
  200. "env import -t $loadaddr $filesize\0" \
  201. "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  202. "mmcboot=echo Booting from mmc ...; " \
  203. "run mmcargs; " \
  204. "bootm ${loadaddr}\0" \
  205. "nandboot=echo Booting from nand ...; " \
  206. "run nandargs; " \
  207. "nand read ${loadaddr} 280000 400000; " \
  208. "bootm ${loadaddr}\0" \
  209. #define CONFIG_BOOTCOMMAND \
  210. "if mmc rescan ${mmcdev}; then " \
  211. "echo SD/MMC found on device ${mmcdev};" \
  212. "if run loadbootenv; then " \
  213. "run importbootenv;" \
  214. "fi;" \
  215. "if test -n $uenvcmd; then " \
  216. "echo Running uenvcmd ...;" \
  217. "run uenvcmd;" \
  218. "fi;" \
  219. "if run loaduimage; then " \
  220. "run mmcboot;" \
  221. "fi;" \
  222. "fi;" \
  223. "run nandboot;" \
  224. #define CONFIG_AUTO_COMPLETE 1
  225. /*
  226. * Miscellaneous configurable options
  227. */
  228. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  229. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  230. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  231. #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # "
  232. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  233. /* Print Buffer Size */
  234. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  235. sizeof(CONFIG_SYS_PROMPT) + 16)
  236. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  237. /* Boot Argument Buffer Size */
  238. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  239. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
  240. /* works on */
  241. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  242. 0x01F00000) /* 31MB */
  243. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
  244. /* load address */
  245. /*
  246. * OMAP3 has 12 GP timers, they can be driven by the system clock
  247. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  248. * This rate is divided by a local divisor.
  249. */
  250. #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
  251. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  252. #define CONFIG_SYS_HZ 1000
  253. /*-----------------------------------------------------------------------
  254. * Stack sizes
  255. *
  256. * The stack sizes are set up in start.S using the settings below
  257. */
  258. #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
  259. #ifdef CONFIG_USE_IRQ
  260. #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
  261. #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
  262. #endif
  263. /*-----------------------------------------------------------------------
  264. * Physical Memory Map
  265. */
  266. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  267. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  268. #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
  269. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  270. /* SDRAM Bank Allocation method */
  271. #define SDRC_R_B_C 1
  272. /*-----------------------------------------------------------------------
  273. * FLASH and environment organization
  274. */
  275. /* **** PISMO SUPPORT *** */
  276. /* Configure the PISMO */
  277. #define PISMO1_NAND_SIZE GPMC_SIZE_128M
  278. #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
  279. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
  280. #if defined(CONFIG_CMD_NAND)
  281. #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
  282. #endif
  283. /* Monitor at start of flash */
  284. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  285. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  286. #define CONFIG_ENV_IS_IN_NAND 1
  287. #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
  288. #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
  289. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  290. #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
  291. #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
  292. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  293. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  294. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  295. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  296. CONFIG_SYS_INIT_RAM_SIZE - \
  297. GENERATED_GBL_DATA_SIZE)
  298. #define CONFIG_OMAP3_SPI
  299. #endif /* __CONFIG_H */