snowball.c 5.9 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2009
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. #include <config.h>
  19. #include <common.h>
  20. #include <malloc.h>
  21. #include <i2c.h>
  22. #include <mmc.h>
  23. #include <asm/types.h>
  24. #include <asm/io.h>
  25. #include <asm/errno.h>
  26. #include <asm/arch/db8500_pincfg.h>
  27. #include <asm/arch/prcmu.h>
  28. #include <asm/arch/hardware.h>
  29. #include <asm/arch/sys_proto.h>
  30. #include "db8500_pins.h"
  31. /*
  32. * Get a global data pointer
  33. */
  34. DECLARE_GLOBAL_DATA_PTR;
  35. /*
  36. * Memory controller register
  37. */
  38. #define DMC_BASE_ADDR 0x80156000
  39. #define DMC_CTL_97 (DMC_BASE_ADDR + 0x184)
  40. /*
  41. * GPIO pin config common for MOP500/HREF boards
  42. */
  43. unsigned long gpio_cfg_common[] = {
  44. /* I2C */
  45. GPIO147_I2C0_SCL,
  46. GPIO148_I2C0_SDA,
  47. GPIO16_I2C1_SCL,
  48. GPIO17_I2C1_SDA,
  49. GPIO10_I2C2_SDA,
  50. GPIO11_I2C2_SCL,
  51. GPIO229_I2C3_SDA,
  52. GPIO230_I2C3_SCL,
  53. /* SSP0, to AB8500 */
  54. GPIO143_SSP0_CLK,
  55. GPIO144_SSP0_FRM,
  56. GPIO145_SSP0_RXD | PIN_PULL_DOWN,
  57. GPIO146_SSP0_TXD,
  58. /* MMC0 (MicroSD card) */
  59. GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
  60. GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
  61. GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
  62. GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
  63. GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
  64. GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
  65. GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
  66. GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
  67. GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
  68. GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
  69. GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
  70. /* MMC4 (On-board eMMC) */
  71. GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
  72. GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
  73. GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
  74. GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
  75. GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
  76. GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
  77. GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
  78. GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
  79. GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
  80. GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
  81. GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
  82. /* UART2, console */
  83. GPIO29_U2_RXD | PIN_INPUT_PULLUP,
  84. GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
  85. GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
  86. GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
  87. /*
  88. * USB, pin 256-267 USB, Is probably already setup correctly from
  89. * BootROM/boot stages, but we don't trust that and set it up anyway
  90. */
  91. GPIO256_USB_NXT,
  92. GPIO257_USB_STP,
  93. GPIO258_USB_XCLK,
  94. GPIO259_USB_DIR,
  95. GPIO260_USB_DAT7,
  96. GPIO261_USB_DAT6,
  97. GPIO262_USB_DAT5,
  98. GPIO263_USB_DAT4,
  99. GPIO264_USB_DAT3,
  100. GPIO265_USB_DAT2,
  101. GPIO266_USB_DAT1,
  102. GPIO267_USB_DAT0,
  103. };
  104. unsigned long gpio_cfg_snowball[] = {
  105. /* MMC0 (MicroSD card) */
  106. GPIO217_GPIO | PIN_OUTPUT_HIGH, /* MMC_EN */
  107. GPIO218_GPIO | PIN_INPUT_NOPULL, /* MMC_CD */
  108. GPIO228_GPIO | PIN_OUTPUT_HIGH, /* SD_SEL */
  109. /* eMMC */
  110. GPIO167_GPIO | PIN_OUTPUT_HIGH, /* RSTn_MLC */
  111. /* LAN */
  112. GPIO131_SM_ADQ8,
  113. GPIO132_SM_ADQ9,
  114. GPIO133_SM_ADQ10,
  115. GPIO134_SM_ADQ11,
  116. GPIO135_SM_ADQ12,
  117. GPIO136_SM_ADQ13,
  118. GPIO137_SM_ADQ14,
  119. GPIO138_SM_ADQ15,
  120. /* RSTn_LAN */
  121. GPIO141_GPIO | PIN_OUTPUT_HIGH,
  122. };
  123. /*
  124. * Miscellaneous platform dependent initialisations
  125. */
  126. int board_init(void)
  127. {
  128. /*
  129. * Setup board (bd) and board-info (bi).
  130. * bi_arch_number: Unique id for this board. It will passed in r1 to
  131. * Linux startup code and is the machine_id.
  132. * bi_boot_params: Where this board expects params.
  133. */
  134. gd->bd->bi_arch_number = MACH_TYPE_SNOWBALL;
  135. gd->bd->bi_boot_params = 0x00000100;
  136. /* Configure GPIO pins needed by U-boot */
  137. db8500_gpio_config_pins(gpio_cfg_common, ARRAY_SIZE(gpio_cfg_common));
  138. db8500_gpio_config_pins(gpio_cfg_snowball,
  139. ARRAY_SIZE(gpio_cfg_snowball));
  140. return 0;
  141. }
  142. int dram_init(void)
  143. {
  144. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  145. gd->ram_size = gd->bd->bi_dram[0].size =
  146. get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
  147. return 0;
  148. }
  149. static int raise_ab8500_gpio16(void)
  150. {
  151. int ret;
  152. /* selection */
  153. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG);
  154. if (ret < 0)
  155. goto out;
  156. ret |= 0x80;
  157. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret);
  158. if (ret < 0)
  159. goto out;
  160. /* direction */
  161. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG);
  162. if (ret < 0)
  163. goto out;
  164. ret |= 0x80;
  165. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret);
  166. if (ret < 0)
  167. goto out;
  168. /* out */
  169. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG);
  170. if (ret < 0)
  171. goto out;
  172. ret |= 0x80;
  173. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret);
  174. out:
  175. return ret;
  176. }
  177. static int raise_ab8500_gpio26(void)
  178. {
  179. int ret;
  180. /* selection */
  181. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
  182. if (ret < 0)
  183. goto out;
  184. ret |= 0x2;
  185. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
  186. if (ret < 0)
  187. goto out;
  188. /* out */
  189. ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
  190. if (ret < 0)
  191. goto out;
  192. ret |= 0x2;
  193. ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
  194. out:
  195. return ret;
  196. }
  197. int board_late_init(void)
  198. {
  199. /* enable 3V3 for LAN controller */
  200. if (raise_ab8500_gpio26() >= 0) {
  201. /* Turn on FSMC device */
  202. writel(0x1, 0x8000f000);
  203. writel(0x1, 0x8000f008);
  204. /* setup FSMC for LAN controler */
  205. writel(0x305b, 0x80000000);
  206. /* run at the highest possible speed */
  207. writel(0x01010210, 0x80000004);
  208. } else
  209. printf("error: can't raise GPIO26\n");
  210. /* enable 3v6 for GBF chip */
  211. if ((raise_ab8500_gpio16() < 0))
  212. printf("error: cant' raise GPIO16\n");
  213. #ifdef CONFIG_MMC
  214. u8500_mmc_power_init();
  215. #endif /* CONFIG_MMC */
  216. return 0;
  217. }