interrupts.c 5.0 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments <www.ti.com>
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2002
  10. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11. * Alex Zuepke <azu@sysgo.de>
  12. *
  13. * (C) Copyright 2002-2004
  14. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15. *
  16. * (C) Copyright 2004
  17. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18. *
  19. * See file CREDITS for list of people who contributed to this
  20. * project.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License as
  24. * published by the Free Software Foundation; either version 2 of
  25. * the License, or (at your option) any later version.
  26. *
  27. * This program is distributed in the hope that it will be useful,
  28. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30. * GNU General Public License for more details.
  31. *
  32. * You should have received a copy of the GNU General Public License
  33. * along with this program; if not, write to the Free Software
  34. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35. * MA 02111-1307 USA
  36. */
  37. #include <common.h>
  38. #include <asm/proc-armv/ptrace.h>
  39. #ifndef CONFIG_INTEGRATOR
  40. /* Only to be used for integrator/AP or /CP */
  41. /* Allows U-Boot to be used with any ARM supplied core module (CM),
  42. * provided the ARM boot monitor, or similar software,
  43. * runs first to set up the platform e.g. map writeable memory to 0x00000000
  44. * - see Integrator User Guides
  45. * Versatile has a supported cpu - arm926ejs
  46. * Some integrator CMs cpus are supported
  47. * CM926EJ-S, CM946E-S
  48. * For platforms with supported cpus U-Boot can be used as the sole boot
  49. * monitor/loader - it will configure the platform itself
  50. * Also U-Boot may be faster/smaller in those cases since specific
  51. * qualities of the cpu and/or CM can be used e.g i and/or d caches etc.
  52. */
  53. #endif
  54. extern void reset_cpu(ulong addr);
  55. #ifdef CONFIG_USE_IRQ
  56. /* enable IRQ interrupts */
  57. void enable_interrupts (void)
  58. {
  59. unsigned long temp;
  60. __asm__ __volatile__("mrs %0, cpsr\n"
  61. "bic %0, %0, #0x80\n"
  62. "msr cpsr_c, %0"
  63. : "=r" (temp)
  64. :
  65. : "memory");
  66. }
  67. /*
  68. * disable IRQ/FIQ interrupts
  69. * returns true if interrupts had been enabled before we disabled them
  70. */
  71. int disable_interrupts (void)
  72. {
  73. unsigned long old,temp;
  74. __asm__ __volatile__("mrs %0, cpsr\n"
  75. "orr %1, %0, #0xc0\n"
  76. "msr cpsr_c, %1"
  77. : "=r" (old), "=r" (temp)
  78. :
  79. : "memory");
  80. return (old & 0x80) == 0;
  81. }
  82. #else
  83. void enable_interrupts (void)
  84. {
  85. return;
  86. }
  87. int disable_interrupts (void)
  88. {
  89. return 0;
  90. }
  91. #endif
  92. void bad_mode (void)
  93. {
  94. panic ("Resetting CPU ...\n");
  95. reset_cpu (0);
  96. }
  97. void show_regs (struct pt_regs *regs)
  98. {
  99. unsigned long flags;
  100. const char *processor_modes[] = {
  101. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  102. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  103. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  104. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  105. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  106. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  107. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  108. "UK12_32", "UK13_32", "UK14_32", "SYS_32",
  109. };
  110. flags = condition_codes (regs);
  111. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  112. "sp : %08lx ip : %08lx fp : %08lx\n",
  113. instruction_pointer (regs),
  114. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  115. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  116. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  117. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  118. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  119. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  120. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  121. printf ("Flags: %c%c%c%c",
  122. flags & CC_N_BIT ? 'N' : 'n',
  123. flags & CC_Z_BIT ? 'Z' : 'z',
  124. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  125. printf (" IRQs %s FIQs %s Mode %s%s\n",
  126. interrupts_enabled (regs) ? "on" : "off",
  127. fast_interrupts_enabled (regs) ? "on" : "off",
  128. processor_modes[processor_mode (regs)],
  129. thumb_mode (regs) ? " (T)" : "");
  130. }
  131. void do_undefined_instruction (struct pt_regs *pt_regs)
  132. {
  133. printf ("undefined instruction\n");
  134. show_regs (pt_regs);
  135. bad_mode ();
  136. }
  137. void do_software_interrupt (struct pt_regs *pt_regs)
  138. {
  139. printf ("software interrupt\n");
  140. show_regs (pt_regs);
  141. bad_mode ();
  142. }
  143. void do_prefetch_abort (struct pt_regs *pt_regs)
  144. {
  145. printf ("prefetch abort\n");
  146. show_regs (pt_regs);
  147. bad_mode ();
  148. }
  149. void do_data_abort (struct pt_regs *pt_regs)
  150. {
  151. printf ("data abort\n");
  152. show_regs (pt_regs);
  153. bad_mode ();
  154. }
  155. void do_not_used (struct pt_regs *pt_regs)
  156. {
  157. printf ("not used\n");
  158. show_regs (pt_regs);
  159. bad_mode ();
  160. }
  161. void do_fiq (struct pt_regs *pt_regs)
  162. {
  163. printf ("fast interrupt request\n");
  164. show_regs (pt_regs);
  165. bad_mode ();
  166. }
  167. void do_irq (struct pt_regs *pt_regs)
  168. {
  169. printf ("interrupt request\n");
  170. show_regs (pt_regs);
  171. bad_mode ();
  172. }
  173. /* The timer functionality is supplied by the Integrator board */
  174. /* - see board/integrator<>.c */