mx1fs2.h 10 KB

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  1. /*
  2. * Copyright (C) 2004 Sascha Hauer, Pengutronix
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. */
  19. #ifndef __CONFIG_H
  20. #define __CONFIG_H
  21. #define CONFIG_ARM920T 1 /* this is an ARM920T CPU */
  22. #define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */
  23. #define CONFIG_MX1FS2 1 /* on a mx1fs2 board */
  24. #undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
  25. /*
  26. * Select serial console configuration
  27. */
  28. #undef _CONFIG_UART1 /* internal uart 1 */
  29. #define _CONFIG_UART2 /* internal uart 2 */
  30. #undef _CONFIG_UART3 /* internal uart 3 */
  31. #undef _CONFIG_UART4 /* internal uart 4 */
  32. #undef CONFIG_SILENT_CONSOLE /* use this to disable output */
  33. /*
  34. * BOOTP options
  35. */
  36. #define CONFIG_BOOTP_BOOTFILESIZE
  37. #define CONFIG_BOOTP_BOOTPATH
  38. #define CONFIG_BOOTP_GATEWAY
  39. #define CONFIG_BOOTP_HOSTNAME
  40. /*
  41. * Command line configuration.
  42. */
  43. #include <config_cmd_default.h>
  44. #define CONFIG_CMD_JFFS2
  45. #undef CONFIG_CMD_CONSOLE
  46. #undef CONFIG_CMD_DHCP
  47. #undef CONFIG_CMD_LOADS
  48. #undef CONFIG_CMD_NET
  49. #undef CONFIG_CMD_PING
  50. #undef CONFIG_CMD_SOURCE
  51. /*
  52. * Boot options. Setting delay to -1 stops autostart count down.
  53. */
  54. #define CONFIG_BOOTDELAY 10
  55. #define CONFIG_BOOTARGS "root=/dev/mtdblock4 console=ttySMX0,115200n8 rootfstype=jffs2"
  56. #define CONFIG_BOOTCOMMAND "bootm 10080000"
  57. #define CONFIG_SHOW_BOOT_PROGRESS
  58. /*
  59. * General options for u-boot. Modify to save memory foot print
  60. */
  61. #define CONFIG_SYS_LONGHELP /* undef saves memory */
  62. #define CONFIG_SYS_PROMPT "mx1fs2> " /* prompt string */
  63. #define CONFIG_SYS_CBSIZE 256 /* console I/O buffer */
  64. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* print buffer size */
  65. #define CONFIG_SYS_MAXARGS 16 /* max command args */
  66. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot args buf size */
  67. #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */
  68. #define CONFIG_SYS_MEMTEST_END 0x08F00000
  69. #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
  70. #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */
  71. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  72. #define CONFIG_BAUDRATE 115200
  73. /*
  74. * Definitions related to passing arguments to kernel.
  75. */
  76. #define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
  77. #define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
  78. #define CONFIG_INITRD_TAG 1 /* send initrd params */
  79. #undef CONFIG_VFD /* do not send framebuffer setup */
  80. /*
  81. * Malloc pool need to host env + 128 Kb reserve for other allocations.
  82. */
  83. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) )
  84. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  85. #define CONFIG_STACKSIZE (120<<10) /* stack size */
  86. #ifdef CONFIG_USE_IRQ
  87. #define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */
  88. #define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */
  89. #endif
  90. /* SDRAM Setup Values
  91. * 0x910a8300 Precharge Command CAS 3
  92. * 0x910a8200 Precharge Command CAS 2
  93. *
  94. * 0xa10a8300 AutoRefresh Command CAS 3
  95. * 0xa10a8200 Set AutoRefresh Command CAS 2
  96. */
  97. #define PRECHARGE_CMD 0x910a8300
  98. #define AUTOREFRESH_CMD 0xa10a8300
  99. #define BUS32BIT_VERSION
  100. /*
  101. * SDRAM Memory Map
  102. */
  103. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */
  104. #define MX1FS2_SDRAM_1 0x08000000 /* SDRAM bank #1 */
  105. #ifdef BUS32BIT_VERSION
  106. #define MX1FS2_SDRAM_1_SIZE (0x04000000 - 0x100000) /* 64 MB - 1M Framebuffer */
  107. #else
  108. #define MX1FS2_SDRAM_1_SIZE (0x01FC0000 - 0x100000) /* 32 MB - 1M Framebuffer */
  109. #endif
  110. /*
  111. * Flash Controller settings
  112. */
  113. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/
  114. #define CONFIG_SYS_MAX_FLASH_SECT 256 /* number of sector in FLASH bank */
  115. #ifdef BUS32BIT_VERSION
  116. #define MX1FS2_FLASH_BUS_WIDTH 4 /* we use 32 bit FLASH memory... */
  117. #define MX1FS2_FLASH_INTERLEAVE 2 /* ... made of 2 chips */
  118. #define MX1FS2_FLASH_BANK_SIZE 0x02000000 /* size of one flash bank*/
  119. #define MX1FS2_FLASH_SECT_SIZE 0x00020000 /* size of erase sector */
  120. #else
  121. #define MX1FS2_FLASH_BUS_WIDTH 2 /* we use 16 bit FLASH memory... */
  122. #define MX1FS2_FLASH_INTERLEAVE 1 /* ... made of 1 chip */
  123. #define MX1FS2_FLASH_BANK_SIZE 0x01000000 /* size of one flash bank*/
  124. #define MX1FS2_FLASH_SECT_SIZE 0x00010000 /* size of erase sector */
  125. #endif
  126. #define MX1FS2_FLASH_BASE 0x10000000 /* location of flash memory */
  127. #define MX1FS2_FLASH_UNLOCK 1 /* perform hw unlock first */
  128. /* This should be defined if CFI FLASH device is present. Actually benefit
  129. is not so clear to me. In other words we can provide more informations
  130. to user, but this expects more complex flash handling we do not provide
  131. now.*/
  132. #undef CONFIG_SYS_FLASH_CFI
  133. #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Erase operation */
  134. #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Write operation */
  135. #define CONFIG_SYS_FLASH_BASE MX1FS2_FLASH_BASE
  136. /*
  137. * This is setting for JFFS2 support in u-boot.
  138. * Right now there is no gain for user, but later on booting kernel might be
  139. * possible. Consider using XIP kernel running from flash to save RAM
  140. * footprint.
  141. * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
  142. */
  143. /*
  144. * JFFS2 partitions
  145. */
  146. /* No command line, one static partition, whole device */
  147. /*
  148. #undef CONFIG_CMD_MTDPARTS
  149. #define CONFIG_JFFS2_DEV "nor0"
  150. #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
  151. #define CONFIG_JFFS2_PART_OFFSET 0x00050000
  152. */
  153. /* mtdparts command line support */
  154. /* Note: fake mtd_id used, no linux mtd map file */
  155. #define CONFIG_CMD_MTDPARTS
  156. #define MTDIDS_DEFAULT "nor0=mx1fs2-0"
  157. #ifdef BUS32BIT_VERSION
  158. #define MTDPARTS_DEFAULT "mtdparts=mx1fs2-0:2m@5m(part0),5m@9m(part1)"
  159. #else
  160. #define MTDPARTS_DEFAULT "mtdparts=mx1fs2-0:-@320k(jffs2)"
  161. #endif
  162. /*
  163. * Environment setup. Definitions of monitor location and size with
  164. * definition of environment setup ends up in 2 possibilities.
  165. * 1. Embeded environment - in u-boot code is space for environment
  166. * 2. Environment is read from predefined sector of flash
  167. * Right now we support 2. possiblity, but expecting no env placed
  168. * on mentioned address right now. This also needs to provide whole
  169. * sector for it - for us 256Kb is really waste of memory. U-boot uses
  170. * default env. and until kernel parameters could be sent to kernel
  171. * env. has no sense to us.
  172. */
  173. #define CONFIG_SYS_MONITOR_BASE 0x10000000
  174. #define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128b ( 1 flash sector ) */
  175. #define CONFIG_ENV_IS_IN_FLASH 1
  176. #define CONFIG_ENV_ADDR 0x10020000 /* absolute address for now */
  177. #define CONFIG_ENV_SIZE 0x20000
  178. #define CONFIG_ENV_OVERWRITE 1 /* env is not writable now */
  179. /* Setup CS4 and CS5 */
  180. #define CONFIG_SYS_GIUS_A_VAL 0x0003fffe
  181. /*
  182. * CSxU_VAL:
  183. * 63| x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x|32
  184. * |DTACK_SEL|0|BCD | BCS | PSZ|PME|SYNC| DOL | CNC| WSC | 0| WWS | EDC |
  185. *
  186. * CSxL_VAL:
  187. * 31| x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x | x x x x| 0
  188. * | OEA | OEN | WEA | WEN | CSA |EBC| DSZ | 0|SP|0|WP| 0 0|PA|CSEN|
  189. */
  190. #define CONFIG_SYS_CS0U_VAL 0x00008C00
  191. #define CONFIG_SYS_CS0L_VAL 0x22222601
  192. #define CONFIG_SYS_CS1U_VAL 0x00008C00
  193. #define CONFIG_SYS_CS1L_VAL 0x22222301
  194. #define CONFIG_SYS_CS4U_VAL 0x00008C00
  195. #define CONFIG_SYS_CS4L_VAL 0x22222301
  196. #define CONFIG_SYS_CS5U_VAL 0x00008C00
  197. #define CONFIG_SYS_CS5L_VAL 0x22222301
  198. /* f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1)
  199. f_ref=16,777MHz
  200. 0x002a141f: 191,9944MHz
  201. 0x040b2007: 144MHz
  202. 0x042a141f: 96MHz
  203. 0x0811140d: 64MHz
  204. 0x040e200e: 150MHz
  205. 0x00321431: 200MHz
  206. 0x08001800: 64MHz mit 16er Quarz
  207. 0x04001800: 96MHz mit 16er Quarz
  208. 0x04002400: 144MHz mit 16er Quarz
  209. 31 |x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x| 0
  210. |XXX|--PD---|-------MFD---------|XXX|--MFI--|-----MFN-----------| */
  211. #define CONFIG_SYS_MPCTL0_VAL 0x07E723AD
  212. #define CONFIG_SYS_MPCTL1_VAL 0x00000040
  213. #define CONFIG_SYS_PCDR_VAL 0x00010005
  214. #define CONFIG_SYS_GPCR_VAL 0x00000FFB
  215. #define USE_16M_OSZI /* If you have one, you want to use it
  216. The internal 32kHz oszillator jitters */
  217. #ifdef USE_16M_OSZI
  218. #define CONFIG_SYS_SPCTL0_VAL 0x04001401
  219. #define CONFIG_SYS_SPCTL1_VAL 0x0C000040
  220. #define CONFIG_SYS_CSCR_VAL 0x07030003
  221. #define CONFIG_SYS_CLK_FREQ 16780000
  222. #define CONFIG_SYSPLL_CLK_FREQ 16000000
  223. #else
  224. #define CONFIG_SYS_SPCTL0_VAL 0x07E716D1
  225. #define CONFIG_SYS_CSCR_VAL 0x06000003
  226. #define CONFIG_SYS_CLK_FREQ 16780000
  227. #define CONFIG_SYSPLL_CLK_FREQ 16780000
  228. #endif
  229. /*
  230. * Well this has to be defined, but on the other hand it is used differently
  231. * one may expect. For instance loadb command do not cares :-)
  232. * So advice is - do not relay on this...
  233. */
  234. #define CONFIG_SYS_LOAD_ADDR 0x08400000
  235. #define CONFIG_SYS_FMCR_VAL 0x00000003 /* Reset Default */
  236. /* Bit[0:3] contain PERCLK1DIV for UART 1
  237. 0x000b00b ->b<- -> 192MHz/12=16MHz
  238. 0x000b00b ->8<- -> 144MHz/09=16MHz
  239. 0x000b00b ->3<- -> 64MHz/4=16MHz */
  240. #ifdef _CONFIG_UART1
  241. #define CONFIG_IMX_SERIAL
  242. #define CONFIG_IMX_SERIAL1
  243. #elif defined _CONFIG_UART2
  244. #define CONFIG_IMX_SERIAL
  245. #define CONFIG_IMX_SERIAL2
  246. #elif defined _CONFIG_UART3 | defined _CONFIG_UART4
  247. #define CONFIG_SYS_NS16550
  248. #define CONFIG_SYS_NS16550_SERIAL
  249. #define CONFIG_SYS_NS16550_CLK 3686400
  250. #define CONFIG_SYS_NS16550_REG_SIZE 1
  251. #define CONFIG_CONS_INDEX 1
  252. #ifdef _CONFIG_UART3
  253. #define CONFIG_SYS_NS16550_COM1 0x15000000
  254. #elif defined _CONFIG_UART4
  255. #define CONFIG_SYS_NS16550_COM1 0x16000000
  256. #endif
  257. #endif
  258. #endif /* __CONFIG_H */