cmd_ide.c 53 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #ifdef CONFIG_MPC512X
  44. #include <mpc512x.h>
  45. #endif
  46. #include <ide.h>
  47. #include <ata.h>
  48. #ifdef CONFIG_STATUS_LED
  49. # include <status_led.h>
  50. #endif
  51. #ifdef CONFIG_IDE_8xx_DIRECT
  52. DECLARE_GLOBAL_DATA_PTR;
  53. #endif
  54. #ifdef __PPC__
  55. # define EIEIO __asm__ volatile ("eieio")
  56. # define SYNC __asm__ volatile ("sync")
  57. #else
  58. # define EIEIO /* nothing */
  59. # define SYNC /* nothing */
  60. #endif
  61. #ifdef CONFIG_IDE_8xx_DIRECT
  62. /* Timings for IDE Interface
  63. *
  64. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  65. * 70 165 30 PIO-Mode 0, [ns]
  66. * 4 9 2 [Cycles]
  67. * 50 125 20 PIO-Mode 1, [ns]
  68. * 3 7 2 [Cycles]
  69. * 30 100 15 PIO-Mode 2, [ns]
  70. * 2 6 1 [Cycles]
  71. * 30 80 10 PIO-Mode 3, [ns]
  72. * 2 5 1 [Cycles]
  73. * 25 70 10 PIO-Mode 4, [ns]
  74. * 2 4 1 [Cycles]
  75. */
  76. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  77. {
  78. /* Setup Length Hold */
  79. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  80. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  81. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  82. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  83. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  84. };
  85. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  86. #ifndef CONFIG_SYS_PIO_MODE
  87. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  88. #endif
  89. static int pio_mode = CONFIG_SYS_PIO_MODE;
  90. /* Make clock cycles and always round up */
  91. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  92. #endif /* CONFIG_IDE_8xx_DIRECT */
  93. /* ------------------------------------------------------------------------- */
  94. /* Current I/O Device */
  95. static int curr_device = -1;
  96. /* Current offset for IDE0 / IDE1 bus access */
  97. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  98. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  99. CONFIG_SYS_ATA_IDE0_OFFSET,
  100. #endif
  101. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  102. CONFIG_SYS_ATA_IDE1_OFFSET,
  103. #endif
  104. };
  105. #ifndef CONFIG_AMIGAONEG3SE
  106. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  107. #else
  108. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS] = {0,};
  109. #endif
  110. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  111. /* ------------------------------------------------------------------------- */
  112. #ifdef CONFIG_IDE_LED
  113. #if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
  114. static void ide_led (uchar led, uchar status);
  115. #else
  116. extern void ide_led (uchar led, uchar status);
  117. #endif
  118. #else
  119. #ifndef CONFIG_AMIGAONEG3SE
  120. #define ide_led(a,b) /* dummy */
  121. #else
  122. extern void ide_led(uchar led, uchar status);
  123. #define LED_IDE1 1
  124. #define LED_IDE2 2
  125. #define CONFIG_IDE_LED 1
  126. #define DEVICE_LED(x) 1
  127. #endif
  128. #endif
  129. #ifdef CONFIG_IDE_RESET
  130. static void ide_reset (void);
  131. #else
  132. #define ide_reset() /* dummy */
  133. #endif
  134. static void ide_ident (block_dev_desc_t *dev_desc);
  135. static uchar ide_wait (int dev, ulong t);
  136. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  137. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  138. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  139. static void input_data(int dev, ulong *sect_buf, int words);
  140. static void output_data(int dev, ulong *sect_buf, int words);
  141. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  142. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  143. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  144. #endif
  145. #ifdef CONFIG_ATAPI
  146. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  147. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  148. #endif
  149. #ifdef CONFIG_IDE_8xx_DIRECT
  150. static void set_pcmcia_timing (int pmode);
  151. #endif
  152. /* ------------------------------------------------------------------------- */
  153. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  154. {
  155. int rcode = 0;
  156. switch (argc) {
  157. case 0:
  158. case 1:
  159. cmd_usage(cmdtp);
  160. return 1;
  161. case 2:
  162. if (strncmp(argv[1],"res",3) == 0) {
  163. puts ("\nReset IDE"
  164. #ifdef CONFIG_IDE_8xx_DIRECT
  165. " on PCMCIA " PCMCIA_SLOT_MSG
  166. #endif
  167. ": ");
  168. ide_init ();
  169. return 0;
  170. } else if (strncmp(argv[1],"inf",3) == 0) {
  171. int i;
  172. putc ('\n');
  173. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  174. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  175. continue; /* list only known devices */
  176. printf ("IDE device %d: ", i);
  177. dev_print(&ide_dev_desc[i]);
  178. }
  179. return 0;
  180. } else if (strncmp(argv[1],"dev",3) == 0) {
  181. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  182. puts ("\nno IDE devices available\n");
  183. return 1;
  184. }
  185. printf ("\nIDE device %d: ", curr_device);
  186. dev_print(&ide_dev_desc[curr_device]);
  187. return 0;
  188. } else if (strncmp(argv[1],"part",4) == 0) {
  189. int dev, ok;
  190. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  191. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  192. ++ok;
  193. if (dev)
  194. putc ('\n');
  195. print_part(&ide_dev_desc[dev]);
  196. }
  197. }
  198. if (!ok) {
  199. puts ("\nno IDE devices available\n");
  200. rcode ++;
  201. }
  202. return rcode;
  203. }
  204. cmd_usage(cmdtp);
  205. return 1;
  206. case 3:
  207. if (strncmp(argv[1],"dev",3) == 0) {
  208. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  209. printf ("\nIDE device %d: ", dev);
  210. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  211. puts ("unknown device\n");
  212. return 1;
  213. }
  214. dev_print(&ide_dev_desc[dev]);
  215. /*ide_print (dev);*/
  216. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  217. return 1;
  218. }
  219. curr_device = dev;
  220. puts ("... is now current device\n");
  221. return 0;
  222. } else if (strncmp(argv[1],"part",4) == 0) {
  223. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  224. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  225. print_part(&ide_dev_desc[dev]);
  226. } else {
  227. printf ("\nIDE device %d not available\n", dev);
  228. rcode = 1;
  229. }
  230. return rcode;
  231. #if 0
  232. } else if (strncmp(argv[1],"pio",4) == 0) {
  233. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  234. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  235. puts ("\nSetting ");
  236. pio_mode = mode;
  237. ide_init ();
  238. } else {
  239. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  240. mode, IDE_MAX_PIO_MODE);
  241. }
  242. return;
  243. #endif
  244. }
  245. cmd_usage(cmdtp);
  246. return 1;
  247. default:
  248. /* at least 4 args */
  249. if (strcmp(argv[1],"read") == 0) {
  250. ulong addr = simple_strtoul(argv[2], NULL, 16);
  251. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  252. ulong n;
  253. #ifdef CONFIG_SYS_64BIT_LBA
  254. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  255. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  256. curr_device, blk, cnt);
  257. #else
  258. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  259. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  260. curr_device, blk, cnt);
  261. #endif
  262. n = ide_dev_desc[curr_device].block_read (curr_device,
  263. blk, cnt,
  264. (ulong *)addr);
  265. /* flush cache after read */
  266. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  267. printf ("%ld blocks read: %s\n",
  268. n, (n==cnt) ? "OK" : "ERROR");
  269. if (n==cnt) {
  270. return 0;
  271. } else {
  272. return 1;
  273. }
  274. } else if (strcmp(argv[1],"write") == 0) {
  275. ulong addr = simple_strtoul(argv[2], NULL, 16);
  276. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  277. ulong n;
  278. #ifdef CONFIG_SYS_64BIT_LBA
  279. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  280. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  281. curr_device, blk, cnt);
  282. #else
  283. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  284. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  285. curr_device, blk, cnt);
  286. #endif
  287. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  288. printf ("%ld blocks written: %s\n",
  289. n, (n==cnt) ? "OK" : "ERROR");
  290. if (n==cnt) {
  291. return 0;
  292. } else {
  293. return 1;
  294. }
  295. } else {
  296. cmd_usage(cmdtp);
  297. rcode = 1;
  298. }
  299. return rcode;
  300. }
  301. }
  302. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  303. {
  304. char *boot_device = NULL;
  305. char *ep;
  306. int dev, part = 0;
  307. ulong addr, cnt;
  308. disk_partition_t info;
  309. image_header_t *hdr;
  310. int rcode = 0;
  311. #if defined(CONFIG_FIT)
  312. const void *fit_hdr = NULL;
  313. #endif
  314. show_boot_progress (41);
  315. switch (argc) {
  316. case 1:
  317. addr = CONFIG_SYS_LOAD_ADDR;
  318. boot_device = getenv ("bootdevice");
  319. break;
  320. case 2:
  321. addr = simple_strtoul(argv[1], NULL, 16);
  322. boot_device = getenv ("bootdevice");
  323. break;
  324. case 3:
  325. addr = simple_strtoul(argv[1], NULL, 16);
  326. boot_device = argv[2];
  327. break;
  328. default:
  329. cmd_usage(cmdtp);
  330. show_boot_progress (-42);
  331. return 1;
  332. }
  333. show_boot_progress (42);
  334. if (!boot_device) {
  335. puts ("\n** No boot device **\n");
  336. show_boot_progress (-43);
  337. return 1;
  338. }
  339. show_boot_progress (43);
  340. dev = simple_strtoul(boot_device, &ep, 16);
  341. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  342. printf ("\n** Device %d not available\n", dev);
  343. show_boot_progress (-44);
  344. return 1;
  345. }
  346. show_boot_progress (44);
  347. if (*ep) {
  348. if (*ep != ':') {
  349. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  350. show_boot_progress (-45);
  351. return 1;
  352. }
  353. part = simple_strtoul(++ep, NULL, 16);
  354. }
  355. show_boot_progress (45);
  356. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  357. show_boot_progress (-46);
  358. return 1;
  359. }
  360. show_boot_progress (46);
  361. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  362. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  363. printf ("\n** Invalid partition type \"%.32s\""
  364. " (expect \"" BOOT_PART_TYPE "\")\n",
  365. info.type);
  366. show_boot_progress (-47);
  367. return 1;
  368. }
  369. show_boot_progress (47);
  370. printf ("\nLoading from IDE device %d, partition %d: "
  371. "Name: %.32s Type: %.32s\n",
  372. dev, part, info.name, info.type);
  373. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  374. info.start, info.size, info.blksz);
  375. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  376. printf ("** Read error on %d:%d\n", dev, part);
  377. show_boot_progress (-48);
  378. return 1;
  379. }
  380. show_boot_progress (48);
  381. switch (genimg_get_format ((void *)addr)) {
  382. case IMAGE_FORMAT_LEGACY:
  383. hdr = (image_header_t *)addr;
  384. show_boot_progress (49);
  385. if (!image_check_hcrc (hdr)) {
  386. puts ("\n** Bad Header Checksum **\n");
  387. show_boot_progress (-50);
  388. return 1;
  389. }
  390. show_boot_progress (50);
  391. image_print_contents (hdr);
  392. cnt = image_get_image_size (hdr);
  393. break;
  394. #if defined(CONFIG_FIT)
  395. case IMAGE_FORMAT_FIT:
  396. fit_hdr = (const void *)addr;
  397. puts ("Fit image detected...\n");
  398. cnt = fit_get_size (fit_hdr);
  399. break;
  400. #endif
  401. default:
  402. show_boot_progress (-49);
  403. puts ("** Unknown image type\n");
  404. return 1;
  405. }
  406. cnt += info.blksz - 1;
  407. cnt /= info.blksz;
  408. cnt -= 1;
  409. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  410. (ulong *)(addr+info.blksz)) != cnt) {
  411. printf ("** Read error on %d:%d\n", dev, part);
  412. show_boot_progress (-51);
  413. return 1;
  414. }
  415. show_boot_progress (51);
  416. #if defined(CONFIG_FIT)
  417. /* This cannot be done earlier, we need complete FIT image in RAM first */
  418. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  419. if (!fit_check_format (fit_hdr)) {
  420. show_boot_progress (-140);
  421. puts ("** Bad FIT image format\n");
  422. return 1;
  423. }
  424. show_boot_progress (141);
  425. fit_print_contents (fit_hdr);
  426. }
  427. #endif
  428. /* Loading ok, update default load address */
  429. load_addr = addr;
  430. /* Check if we should attempt an auto-start */
  431. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  432. char *local_args[2];
  433. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  434. local_args[0] = argv[0];
  435. local_args[1] = NULL;
  436. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  437. do_bootm (cmdtp, 0, 1, local_args);
  438. rcode = 1;
  439. }
  440. return rcode;
  441. }
  442. /* ------------------------------------------------------------------------- */
  443. void inline
  444. __ide_outb(int dev, int port, unsigned char val)
  445. {
  446. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  447. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  448. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  449. }
  450. void inline ide_outb (int dev, int port, unsigned char val)
  451. __attribute__((weak, alias("__ide_outb")));
  452. unsigned char inline
  453. __ide_inb(int dev, int port)
  454. {
  455. uchar val;
  456. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  457. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  458. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  459. return val;
  460. }
  461. unsigned char inline ide_inb(int dev, int port)
  462. __attribute__((weak, alias("__ide_inb")));
  463. #ifdef CONFIG_TUNE_PIO
  464. int inline
  465. __ide_set_piomode(int pio_mode)
  466. {
  467. return 0;
  468. }
  469. int inline ide_set_piomode(int pio_mode)
  470. __attribute__((weak, alias("__ide_set_piomode")));
  471. #endif
  472. void ide_init (void)
  473. {
  474. #ifdef CONFIG_IDE_8xx_DIRECT
  475. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  476. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  477. #endif
  478. unsigned char c;
  479. int i, bus;
  480. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  481. unsigned int ata_reset_time = ATA_RESET_TIME;
  482. char *s;
  483. #endif
  484. #ifdef CONFIG_AMIGAONEG3SE
  485. unsigned int max_bus_scan;
  486. #endif
  487. #ifdef CONFIG_IDE_8xx_PCCARD
  488. extern int pcmcia_on (void);
  489. extern int ide_devices_found; /* Initialized in check_ide_device() */
  490. #endif /* CONFIG_IDE_8xx_PCCARD */
  491. #ifdef CONFIG_IDE_PREINIT
  492. extern int ide_preinit (void);
  493. WATCHDOG_RESET();
  494. if (ide_preinit ()) {
  495. puts ("ide_preinit failed\n");
  496. return;
  497. }
  498. #endif /* CONFIG_IDE_PREINIT */
  499. #ifdef CONFIG_IDE_8xx_PCCARD
  500. extern int pcmcia_on (void);
  501. extern int ide_devices_found; /* Initialized in check_ide_device() */
  502. WATCHDOG_RESET();
  503. ide_devices_found = 0;
  504. /* initialize the PCMCIA IDE adapter card */
  505. pcmcia_on();
  506. if (!ide_devices_found)
  507. return;
  508. udelay (1000000); /* 1 s */
  509. #endif /* CONFIG_IDE_8xx_PCCARD */
  510. WATCHDOG_RESET();
  511. #ifdef CONFIG_IDE_8xx_DIRECT
  512. /* Initialize PIO timing tables */
  513. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  514. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  515. gd->bus_clk);
  516. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  517. gd->bus_clk);
  518. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  519. gd->bus_clk);
  520. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  521. " len=%3d ns/%d clk"
  522. " hold=%2d ns/%d clk\n",
  523. i,
  524. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  525. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  526. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  527. }
  528. #endif /* CONFIG_IDE_8xx_DIRECT */
  529. /* Reset the IDE just to be sure.
  530. * Light LED's to show
  531. */
  532. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  533. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  534. #ifdef CONFIG_IDE_8xx_DIRECT
  535. /* PCMCIA / IDE initialization for common mem space */
  536. pcmp->pcmc_pgcrb = 0;
  537. /* start in PIO mode 0 - most relaxed timings */
  538. pio_mode = 0;
  539. set_pcmcia_timing (pio_mode);
  540. #endif /* CONFIG_IDE_8xx_DIRECT */
  541. /*
  542. * Wait for IDE to get ready.
  543. * According to spec, this can take up to 31 seconds!
  544. */
  545. #ifndef CONFIG_AMIGAONEG3SE
  546. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  547. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  548. #else
  549. s = getenv("ide_maxbus");
  550. if (s)
  551. max_bus_scan = simple_strtol(s, NULL, 10);
  552. else
  553. max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
  554. for (bus=0; bus<max_bus_scan; ++bus) {
  555. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / max_bus_scan);
  556. #endif
  557. #ifdef CONFIG_IDE_8xx_PCCARD
  558. /* Skip non-ide devices from probing */
  559. if ((ide_devices_found & (1 << bus)) == 0) {
  560. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  561. continue;
  562. }
  563. #endif
  564. printf ("Bus %d: ", bus);
  565. ide_bus_ok[bus] = 0;
  566. /* Select device
  567. */
  568. udelay (100000); /* 100 ms */
  569. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  570. udelay (100000); /* 100 ms */
  571. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  572. if ((s = getenv("ide_reset_timeout")) != NULL)
  573. ata_reset_time = simple_strtol(s, NULL, 10);
  574. #endif
  575. i = 0;
  576. do {
  577. udelay (10000); /* 10 ms */
  578. c = ide_inb (dev, ATA_STATUS);
  579. i++;
  580. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  581. if (i > (ata_reset_time * 100)) {
  582. #else
  583. if (i > (ATA_RESET_TIME * 100)) {
  584. #endif
  585. puts ("** Timeout **\n");
  586. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  587. #ifdef CONFIG_AMIGAONEG3SE
  588. /* If this is the second bus, the first one was OK */
  589. if (bus != 0) {
  590. ide_bus_ok[bus] = 0;
  591. goto skip_bus;
  592. }
  593. #endif
  594. return;
  595. }
  596. if ((i >= 100) && ((i%100)==0)) {
  597. putc ('.');
  598. }
  599. } while (c & ATA_STAT_BUSY);
  600. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  601. puts ("not available ");
  602. debug ("Status = 0x%02X ", c);
  603. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  604. } else if ((c & ATA_STAT_READY) == 0) {
  605. puts ("not available ");
  606. debug ("Status = 0x%02X ", c);
  607. #endif
  608. } else {
  609. puts ("OK ");
  610. ide_bus_ok[bus] = 1;
  611. }
  612. WATCHDOG_RESET();
  613. }
  614. #ifdef CONFIG_AMIGAONEG3SE
  615. skip_bus:
  616. #endif
  617. putc ('\n');
  618. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  619. curr_device = -1;
  620. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  621. #ifdef CONFIG_IDE_LED
  622. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  623. #endif
  624. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  625. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  626. ide_dev_desc[i].dev=i;
  627. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  628. ide_dev_desc[i].blksz=0;
  629. ide_dev_desc[i].lba=0;
  630. ide_dev_desc[i].block_read=ide_read;
  631. if (!ide_bus_ok[IDE_BUS(i)])
  632. continue;
  633. ide_led (led, 1); /* LED on */
  634. ide_ident(&ide_dev_desc[i]);
  635. ide_led (led, 0); /* LED off */
  636. dev_print(&ide_dev_desc[i]);
  637. /* ide_print (i); */
  638. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  639. init_part (&ide_dev_desc[i]); /* initialize partition type */
  640. if (curr_device < 0)
  641. curr_device = i;
  642. }
  643. }
  644. WATCHDOG_RESET();
  645. }
  646. /* ------------------------------------------------------------------------- */
  647. block_dev_desc_t * ide_get_dev(int dev)
  648. {
  649. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  650. }
  651. #ifdef CONFIG_IDE_8xx_DIRECT
  652. static void
  653. set_pcmcia_timing (int pmode)
  654. {
  655. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  656. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  657. ulong timings;
  658. debug ("Set timing for PIO Mode %d\n", pmode);
  659. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  660. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  661. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  662. ;
  663. /* IDE 0
  664. */
  665. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  666. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  667. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  668. | timings
  669. #endif
  670. ;
  671. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  672. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  673. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  674. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  675. | timings
  676. #endif
  677. ;
  678. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  679. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  680. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  681. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  682. | timings
  683. #endif
  684. ;
  685. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  686. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  687. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  688. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  689. | timings
  690. #endif
  691. ;
  692. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  693. /* IDE 1
  694. */
  695. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  696. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  697. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  698. | timings
  699. #endif
  700. ;
  701. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  702. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  703. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  704. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  705. | timings
  706. #endif
  707. ;
  708. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  709. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  710. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  711. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  712. | timings
  713. #endif
  714. ;
  715. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  716. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  717. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  718. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  719. | timings
  720. #endif
  721. ;
  722. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  723. }
  724. #endif /* CONFIG_IDE_8xx_DIRECT */
  725. /* ------------------------------------------------------------------------- */
  726. #ifdef __PPC__
  727. # ifdef CONFIG_AMIGAONEG3SE
  728. static void
  729. output_data_short(int dev, ulong *sect_buf, int words)
  730. {
  731. ushort *dbuf;
  732. volatile ushort *pbuf;
  733. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  734. dbuf = (ushort *)sect_buf;
  735. while (words--) {
  736. EIEIO;
  737. *pbuf = *dbuf++;
  738. EIEIO;
  739. }
  740. if (words&1)
  741. *pbuf = 0;
  742. }
  743. # endif /* CONFIG_AMIGAONEG3SE */
  744. #endif /* __PPC_ */
  745. /* We only need to swap data if we are running on a big endian cpu. */
  746. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  747. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  748. #define input_swap_data(x,y,z) input_data(x,y,z)
  749. #else
  750. static void
  751. input_swap_data(int dev, ulong *sect_buf, int words)
  752. {
  753. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  754. uchar i;
  755. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  756. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  757. ushort *dbuf = (ushort *)sect_buf;
  758. while (words--) {
  759. for (i=0; i<2; i++) {
  760. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  761. *(uchar *)dbuf = *pbuf_odd;
  762. dbuf+=1;
  763. }
  764. }
  765. #else
  766. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  767. ushort *dbuf = (ushort *)sect_buf;
  768. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  769. while (words--) {
  770. #ifdef __MIPS__
  771. *dbuf++ = swab16p((u16*)pbuf);
  772. *dbuf++ = swab16p((u16*)pbuf);
  773. #elif defined(CONFIG_PCS440EP)
  774. *dbuf++ = *pbuf;
  775. *dbuf++ = *pbuf;
  776. #else
  777. *dbuf++ = ld_le16(pbuf);
  778. *dbuf++ = ld_le16(pbuf);
  779. #endif /* !MIPS */
  780. }
  781. #endif
  782. }
  783. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  784. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  785. static void
  786. output_data(int dev, ulong *sect_buf, int words)
  787. {
  788. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  789. uchar *dbuf;
  790. volatile uchar *pbuf_even;
  791. volatile uchar *pbuf_odd;
  792. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  793. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  794. dbuf = (uchar *)sect_buf;
  795. while (words--) {
  796. EIEIO;
  797. *pbuf_even = *dbuf++;
  798. EIEIO;
  799. *pbuf_odd = *dbuf++;
  800. EIEIO;
  801. *pbuf_even = *dbuf++;
  802. EIEIO;
  803. *pbuf_odd = *dbuf++;
  804. }
  805. #else
  806. ushort *dbuf;
  807. volatile ushort *pbuf;
  808. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  809. dbuf = (ushort *)sect_buf;
  810. while (words--) {
  811. #if defined(CONFIG_PCS440EP)
  812. /* not tested, because CF was write protected */
  813. EIEIO;
  814. *pbuf = ld_le16(dbuf++);
  815. EIEIO;
  816. *pbuf = ld_le16(dbuf++);
  817. #else
  818. EIEIO;
  819. *pbuf = *dbuf++;
  820. EIEIO;
  821. *pbuf = *dbuf++;
  822. #endif
  823. }
  824. #endif
  825. }
  826. #else /* ! __PPC__ */
  827. static void
  828. output_data(int dev, ulong *sect_buf, int words)
  829. {
  830. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  831. }
  832. #endif /* __PPC__ */
  833. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  834. static void
  835. input_data(int dev, ulong *sect_buf, int words)
  836. {
  837. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  838. uchar *dbuf;
  839. volatile uchar *pbuf_even;
  840. volatile uchar *pbuf_odd;
  841. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  842. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  843. dbuf = (uchar *)sect_buf;
  844. while (words--) {
  845. *dbuf++ = *pbuf_even;
  846. EIEIO;
  847. SYNC;
  848. *dbuf++ = *pbuf_odd;
  849. EIEIO;
  850. SYNC;
  851. *dbuf++ = *pbuf_even;
  852. EIEIO;
  853. SYNC;
  854. *dbuf++ = *pbuf_odd;
  855. EIEIO;
  856. SYNC;
  857. }
  858. #else
  859. ushort *dbuf;
  860. volatile ushort *pbuf;
  861. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  862. dbuf = (ushort *)sect_buf;
  863. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  864. while (words--) {
  865. #if defined(CONFIG_PCS440EP)
  866. EIEIO;
  867. *dbuf++ = ld_le16(pbuf);
  868. EIEIO;
  869. *dbuf++ = ld_le16(pbuf);
  870. #else
  871. EIEIO;
  872. *dbuf++ = *pbuf;
  873. EIEIO;
  874. *dbuf++ = *pbuf;
  875. #endif
  876. }
  877. #endif
  878. }
  879. #else /* ! __PPC__ */
  880. static void
  881. input_data(int dev, ulong *sect_buf, int words)
  882. {
  883. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  884. }
  885. #endif /* __PPC__ */
  886. #ifdef CONFIG_AMIGAONEG3SE
  887. static void
  888. input_data_short(int dev, ulong *sect_buf, int words)
  889. {
  890. ushort *dbuf;
  891. volatile ushort *pbuf;
  892. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  893. dbuf = (ushort *)sect_buf;
  894. while (words--) {
  895. EIEIO;
  896. *dbuf++ = *pbuf;
  897. EIEIO;
  898. }
  899. if (words&1) {
  900. ushort dummy;
  901. dummy = *pbuf;
  902. }
  903. }
  904. #endif
  905. /* -------------------------------------------------------------------------
  906. */
  907. static void ide_ident (block_dev_desc_t *dev_desc)
  908. {
  909. ulong iobuf[ATA_SECTORWORDS];
  910. unsigned char c;
  911. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  912. #ifdef CONFIG_AMIGAONEG3SE
  913. int max_bus_scan;
  914. char *s;
  915. #endif
  916. #ifdef CONFIG_ATAPI
  917. int retries = 0;
  918. int do_retry = 0;
  919. #endif
  920. #ifdef CONFIG_TUNE_PIO
  921. int pio_mode;
  922. #endif
  923. #if 0
  924. int mode, cycle_time;
  925. #endif
  926. int device;
  927. device=dev_desc->dev;
  928. printf (" Device %d: ", device);
  929. #ifdef CONFIG_AMIGAONEG3SE
  930. s = getenv("ide_maxbus");
  931. if (s) {
  932. max_bus_scan = simple_strtol(s, NULL, 10);
  933. } else {
  934. max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
  935. }
  936. if (device >= max_bus_scan*2) {
  937. dev_desc->type=DEV_TYPE_UNKNOWN;
  938. return;
  939. }
  940. #endif
  941. ide_led (DEVICE_LED(device), 1); /* LED on */
  942. /* Select device
  943. */
  944. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  945. dev_desc->if_type=IF_TYPE_IDE;
  946. #ifdef CONFIG_ATAPI
  947. do_retry = 0;
  948. retries = 0;
  949. /* Warning: This will be tricky to read */
  950. while (retries <= 1) {
  951. /* check signature */
  952. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  953. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  954. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  955. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  956. /* ATAPI Signature found */
  957. dev_desc->if_type=IF_TYPE_ATAPI;
  958. /* Start Ident Command
  959. */
  960. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  961. /*
  962. * Wait for completion - ATAPI devices need more time
  963. * to become ready
  964. */
  965. c = ide_wait (device, ATAPI_TIME_OUT);
  966. } else
  967. #endif
  968. {
  969. /* Start Ident Command
  970. */
  971. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  972. /* Wait for completion
  973. */
  974. c = ide_wait (device, IDE_TIME_OUT);
  975. }
  976. ide_led (DEVICE_LED(device), 0); /* LED off */
  977. if (((c & ATA_STAT_DRQ) == 0) ||
  978. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  979. #ifdef CONFIG_ATAPI
  980. #ifdef CONFIG_AMIGAONEG3SE
  981. s = getenv("ide_doreset");
  982. if (s && strcmp(s, "on") == 0)
  983. #endif
  984. {
  985. /* Need to soft reset the device in case it's an ATAPI... */
  986. debug ("Retrying...\n");
  987. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  988. udelay(100000);
  989. ide_outb (device, ATA_COMMAND, 0x08);
  990. udelay (500000); /* 500 ms */
  991. }
  992. /* Select device
  993. */
  994. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  995. retries++;
  996. #else
  997. return;
  998. #endif
  999. }
  1000. #ifdef CONFIG_ATAPI
  1001. else
  1002. break;
  1003. } /* see above - ugly to read */
  1004. if (retries == 2) /* Not found */
  1005. return;
  1006. #endif
  1007. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  1008. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  1009. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  1010. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  1011. #ifdef __LITTLE_ENDIAN
  1012. /*
  1013. * firmware revision, model, and serial number have Big Endian Byte
  1014. * order in Word. Convert all three to little endian.
  1015. *
  1016. * See CF+ and CompactFlash Specification Revision 2.0:
  1017. * 6.2.1.6: Identify Drive, Table 39 for more details
  1018. */
  1019. strswab (dev_desc->revision);
  1020. strswab (dev_desc->vendor);
  1021. strswab (dev_desc->product);
  1022. #endif /* __LITTLE_ENDIAN */
  1023. if ((iop->config & 0x0080)==0x0080)
  1024. dev_desc->removable = 1;
  1025. else
  1026. dev_desc->removable = 0;
  1027. #ifdef CONFIG_TUNE_PIO
  1028. /* Mode 0 - 2 only, are directly determined by word 51. */
  1029. pio_mode = iop->tPIO;
  1030. if (pio_mode > 2) {
  1031. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  1032. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  1033. }
  1034. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  1035. * shall set bit 1 of word 53 to one and support the fields contained
  1036. * in words 64 through 70.
  1037. */
  1038. if (iop->field_valid & 0x02) {
  1039. /* Mode 3 and above are possible. Check in order from slow
  1040. * to fast, so we wind up with the highest mode allowed.
  1041. */
  1042. if (iop->eide_pio_modes & 0x01)
  1043. pio_mode = 3;
  1044. if (iop->eide_pio_modes & 0x02)
  1045. pio_mode = 4;
  1046. if (ata_id_is_cfa((u16 *)iop)) {
  1047. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  1048. pio_mode = 5;
  1049. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  1050. pio_mode = 6;
  1051. }
  1052. }
  1053. /* System-specific, depends on bus speeds, etc. */
  1054. ide_set_piomode(pio_mode);
  1055. #endif /* CONFIG_TUNE_PIO */
  1056. #if 0
  1057. /*
  1058. * Drive PIO mode autoselection
  1059. */
  1060. mode = iop->tPIO;
  1061. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  1062. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  1063. mode = 2;
  1064. debug ("Override tPIO -> 2\n");
  1065. }
  1066. if (iop->field_valid & 2) { /* drive implements ATA2? */
  1067. debug ("Drive implements ATA2\n");
  1068. if (iop->capability & 8) { /* drive supports use_iordy? */
  1069. cycle_time = iop->eide_pio_iordy;
  1070. } else {
  1071. cycle_time = iop->eide_pio;
  1072. }
  1073. debug ("cycle time = %d\n", cycle_time);
  1074. mode = 4;
  1075. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  1076. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  1077. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  1078. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  1079. }
  1080. printf ("PIO mode to use: PIO %d\n", mode);
  1081. #endif /* 0 */
  1082. #ifdef CONFIG_ATAPI
  1083. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  1084. atapi_inquiry(dev_desc);
  1085. return;
  1086. }
  1087. #endif /* CONFIG_ATAPI */
  1088. #ifdef __BIG_ENDIAN
  1089. /* swap shorts */
  1090. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  1091. #else /* ! __BIG_ENDIAN */
  1092. /*
  1093. * do not swap shorts on little endian
  1094. *
  1095. * See CF+ and CompactFlash Specification Revision 2.0:
  1096. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1097. */
  1098. dev_desc->lba = iop->lba_capacity;
  1099. #endif /* __BIG_ENDIAN */
  1100. #ifdef CONFIG_LBA48
  1101. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1102. dev_desc->lba48 = 1;
  1103. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1104. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1105. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1106. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1107. } else {
  1108. dev_desc->lba48 = 0;
  1109. }
  1110. #endif /* CONFIG_LBA48 */
  1111. /* assuming HD */
  1112. dev_desc->type=DEV_TYPE_HARDDISK;
  1113. dev_desc->blksz=ATA_BLOCKSIZE;
  1114. dev_desc->lun=0; /* just to fill something in... */
  1115. #if 0 /* only used to test the powersaving mode,
  1116. * if enabled, the drive goes after 5 sec
  1117. * in standby mode */
  1118. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1119. c = ide_wait (device, IDE_TIME_OUT);
  1120. ide_outb (device, ATA_SECT_CNT, 1);
  1121. ide_outb (device, ATA_LBA_LOW, 0);
  1122. ide_outb (device, ATA_LBA_MID, 0);
  1123. ide_outb (device, ATA_LBA_HIGH, 0);
  1124. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1125. ide_outb (device, ATA_COMMAND, 0xe3);
  1126. udelay (50);
  1127. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1128. #endif
  1129. }
  1130. /* ------------------------------------------------------------------------- */
  1131. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1132. {
  1133. ulong n = 0;
  1134. unsigned char c;
  1135. unsigned char pwrsave=0; /* power save */
  1136. #ifdef CONFIG_LBA48
  1137. unsigned char lba48 = 0;
  1138. if (blknr & 0x0000fffff0000000ULL) {
  1139. /* more than 28 bits used, use 48bit mode */
  1140. lba48 = 1;
  1141. }
  1142. #endif
  1143. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1144. device, blknr, blkcnt, (ulong)buffer);
  1145. ide_led (DEVICE_LED(device), 1); /* LED on */
  1146. /* Select device
  1147. */
  1148. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1149. c = ide_wait (device, IDE_TIME_OUT);
  1150. if (c & ATA_STAT_BUSY) {
  1151. printf ("IDE read: device %d not ready\n", device);
  1152. goto IDE_READ_E;
  1153. }
  1154. /* first check if the drive is in Powersaving mode, if yes,
  1155. * increase the timeout value */
  1156. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1157. udelay (50);
  1158. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1159. if (c & ATA_STAT_BUSY) {
  1160. printf ("IDE read: device %d not ready\n", device);
  1161. goto IDE_READ_E;
  1162. }
  1163. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1164. printf ("No Powersaving mode %X\n", c);
  1165. } else {
  1166. c = ide_inb(device,ATA_SECT_CNT);
  1167. debug ("Powersaving %02X\n",c);
  1168. if(c==0)
  1169. pwrsave=1;
  1170. }
  1171. while (blkcnt-- > 0) {
  1172. c = ide_wait (device, IDE_TIME_OUT);
  1173. if (c & ATA_STAT_BUSY) {
  1174. printf ("IDE read: device %d not ready\n", device);
  1175. break;
  1176. }
  1177. #ifdef CONFIG_LBA48
  1178. if (lba48) {
  1179. /* write high bits */
  1180. ide_outb (device, ATA_SECT_CNT, 0);
  1181. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1182. #ifdef CONFIG_SYS_64BIT_LBA
  1183. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1184. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1185. #else
  1186. ide_outb (device, ATA_LBA_MID, 0);
  1187. ide_outb (device, ATA_LBA_HIGH, 0);
  1188. #endif
  1189. }
  1190. #endif
  1191. ide_outb (device, ATA_SECT_CNT, 1);
  1192. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1193. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1194. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1195. #ifdef CONFIG_LBA48
  1196. if (lba48) {
  1197. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1198. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1199. } else
  1200. #endif
  1201. {
  1202. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1203. ATA_DEVICE(device) |
  1204. ((blknr >> 24) & 0xF) );
  1205. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1206. }
  1207. udelay (50);
  1208. if(pwrsave) {
  1209. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1210. pwrsave=0;
  1211. } else {
  1212. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1213. }
  1214. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1215. #if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF)
  1216. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1217. device, blknr, c);
  1218. #else
  1219. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1220. device, (ulong)blknr, c);
  1221. #endif
  1222. break;
  1223. }
  1224. input_data (device, buffer, ATA_SECTORWORDS);
  1225. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1226. ++n;
  1227. ++blknr;
  1228. buffer += ATA_BLOCKSIZE;
  1229. }
  1230. IDE_READ_E:
  1231. ide_led (DEVICE_LED(device), 0); /* LED off */
  1232. return (n);
  1233. }
  1234. /* ------------------------------------------------------------------------- */
  1235. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1236. {
  1237. ulong n = 0;
  1238. unsigned char c;
  1239. #ifdef CONFIG_LBA48
  1240. unsigned char lba48 = 0;
  1241. if (blknr & 0x0000fffff0000000ULL) {
  1242. /* more than 28 bits used, use 48bit mode */
  1243. lba48 = 1;
  1244. }
  1245. #endif
  1246. ide_led (DEVICE_LED(device), 1); /* LED on */
  1247. /* Select device
  1248. */
  1249. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1250. while (blkcnt-- > 0) {
  1251. c = ide_wait (device, IDE_TIME_OUT);
  1252. if (c & ATA_STAT_BUSY) {
  1253. printf ("IDE read: device %d not ready\n", device);
  1254. goto WR_OUT;
  1255. }
  1256. #ifdef CONFIG_LBA48
  1257. if (lba48) {
  1258. /* write high bits */
  1259. ide_outb (device, ATA_SECT_CNT, 0);
  1260. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1261. #ifdef CONFIG_SYS_64BIT_LBA
  1262. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1263. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1264. #else
  1265. ide_outb (device, ATA_LBA_MID, 0);
  1266. ide_outb (device, ATA_LBA_HIGH, 0);
  1267. #endif
  1268. }
  1269. #endif
  1270. ide_outb (device, ATA_SECT_CNT, 1);
  1271. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1272. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1273. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1274. #ifdef CONFIG_LBA48
  1275. if (lba48) {
  1276. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1277. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1278. } else
  1279. #endif
  1280. {
  1281. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1282. ATA_DEVICE(device) |
  1283. ((blknr >> 24) & 0xF) );
  1284. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1285. }
  1286. udelay (50);
  1287. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1288. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1289. #if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF)
  1290. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1291. device, blknr, c);
  1292. #else
  1293. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1294. device, (ulong)blknr, c);
  1295. #endif
  1296. goto WR_OUT;
  1297. }
  1298. output_data (device, buffer, ATA_SECTORWORDS);
  1299. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1300. ++n;
  1301. ++blknr;
  1302. buffer += ATA_BLOCKSIZE;
  1303. }
  1304. WR_OUT:
  1305. ide_led (DEVICE_LED(device), 0); /* LED off */
  1306. return (n);
  1307. }
  1308. /* ------------------------------------------------------------------------- */
  1309. /*
  1310. * copy src to dest, skipping leading and trailing blanks and null
  1311. * terminate the string
  1312. * "len" is the size of available memory including the terminating '\0'
  1313. */
  1314. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1315. {
  1316. unsigned char *end, *last;
  1317. last = dst;
  1318. end = src + len - 1;
  1319. /* reserve space for '\0' */
  1320. if (len < 2)
  1321. goto OUT;
  1322. /* skip leading white space */
  1323. while ((*src) && (src<end) && (*src==' '))
  1324. ++src;
  1325. /* copy string, omitting trailing white space */
  1326. while ((*src) && (src<end)) {
  1327. *dst++ = *src;
  1328. if (*src++ != ' ')
  1329. last = dst;
  1330. }
  1331. OUT:
  1332. *last = '\0';
  1333. }
  1334. /* ------------------------------------------------------------------------- */
  1335. /*
  1336. * Wait until Busy bit is off, or timeout (in ms)
  1337. * Return last status
  1338. */
  1339. static uchar ide_wait (int dev, ulong t)
  1340. {
  1341. ulong delay = 10 * t; /* poll every 100 us */
  1342. uchar c;
  1343. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1344. udelay (100);
  1345. if (delay-- == 0) {
  1346. break;
  1347. }
  1348. }
  1349. return (c);
  1350. }
  1351. /* ------------------------------------------------------------------------- */
  1352. #ifdef CONFIG_IDE_RESET
  1353. extern void ide_set_reset(int idereset);
  1354. static void ide_reset (void)
  1355. {
  1356. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1357. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1358. #endif
  1359. int i;
  1360. curr_device = -1;
  1361. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1362. ide_bus_ok[i] = 0;
  1363. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1364. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1365. ide_set_reset (1); /* assert reset */
  1366. /* the reset signal shall be asserted for et least 25 us */
  1367. udelay(25);
  1368. WATCHDOG_RESET();
  1369. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1370. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1371. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1372. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1373. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1374. /* wait 500 ms for the voltage to stabilize
  1375. */
  1376. for (i=0; i<500; ++i) {
  1377. udelay (1000);
  1378. }
  1379. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1380. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1381. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1382. /* configure IDE Motor voltage monitor pin as input */
  1383. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1384. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1385. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1386. /* wait up to 1 s for the motor voltage to stabilize
  1387. */
  1388. for (i=0; i<1000; ++i) {
  1389. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1390. break;
  1391. }
  1392. udelay (1000);
  1393. }
  1394. if (i == 1000) { /* Timeout */
  1395. printf ("\nWarning: 5V for IDE Motor missing\n");
  1396. # ifdef CONFIG_STATUS_LED
  1397. # ifdef STATUS_LED_YELLOW
  1398. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1399. # endif
  1400. # ifdef STATUS_LED_GREEN
  1401. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1402. # endif
  1403. # endif /* CONFIG_STATUS_LED */
  1404. }
  1405. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1406. WATCHDOG_RESET();
  1407. /* de-assert RESET signal */
  1408. ide_set_reset(0);
  1409. /* wait 250 ms */
  1410. for (i=0; i<250; ++i) {
  1411. udelay (1000);
  1412. }
  1413. }
  1414. #endif /* CONFIG_IDE_RESET */
  1415. /* ------------------------------------------------------------------------- */
  1416. #if defined(CONFIG_IDE_LED) && \
  1417. !defined(CONFIG_AMIGAONEG3SE)&& \
  1418. !defined(CONFIG_CPC45) && \
  1419. !defined(CONFIG_HMI10) && \
  1420. !defined(CONFIG_KUP4K) && \
  1421. !defined(CONFIG_KUP4X)
  1422. static uchar led_buffer = 0; /* Buffer for current LED status */
  1423. static void ide_led (uchar led, uchar status)
  1424. {
  1425. uchar *led_port = LED_PORT;
  1426. if (status) { /* switch LED on */
  1427. led_buffer |= led;
  1428. } else { /* switch LED off */
  1429. led_buffer &= ~led;
  1430. }
  1431. *led_port = led_buffer;
  1432. }
  1433. #endif /* CONFIG_IDE_LED */
  1434. /* ------------------------------------------------------------------------- */
  1435. #ifdef CONFIG_ATAPI
  1436. /****************************************************************************
  1437. * ATAPI Support
  1438. */
  1439. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  1440. /* since ATAPI may use commands with not 4 bytes alligned length
  1441. * we have our own transfer functions, 2 bytes alligned */
  1442. static void
  1443. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1444. {
  1445. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1446. uchar *dbuf;
  1447. volatile uchar *pbuf_even;
  1448. volatile uchar *pbuf_odd;
  1449. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1450. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1451. while (shorts--) {
  1452. EIEIO;
  1453. *pbuf_even = *dbuf++;
  1454. EIEIO;
  1455. *pbuf_odd = *dbuf++;
  1456. }
  1457. #else
  1458. ushort *dbuf;
  1459. volatile ushort *pbuf;
  1460. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1461. dbuf = (ushort *)sect_buf;
  1462. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1463. while (shorts--) {
  1464. EIEIO;
  1465. *pbuf = *dbuf++;
  1466. }
  1467. #endif
  1468. }
  1469. static void
  1470. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1471. {
  1472. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1473. uchar *dbuf;
  1474. volatile uchar *pbuf_even;
  1475. volatile uchar *pbuf_odd;
  1476. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1477. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1478. while (shorts--) {
  1479. EIEIO;
  1480. *dbuf++ = *pbuf_even;
  1481. EIEIO;
  1482. *dbuf++ = *pbuf_odd;
  1483. }
  1484. #else
  1485. ushort *dbuf;
  1486. volatile ushort *pbuf;
  1487. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1488. dbuf = (ushort *)sect_buf;
  1489. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1490. while (shorts--) {
  1491. EIEIO;
  1492. *dbuf++ = *pbuf;
  1493. }
  1494. #endif
  1495. }
  1496. #else /* ! __PPC__ */
  1497. static void
  1498. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1499. {
  1500. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1501. }
  1502. static void
  1503. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1504. {
  1505. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1506. }
  1507. #endif /* __PPC__ */
  1508. /*
  1509. * Wait until (Status & mask) == res, or timeout (in ms)
  1510. * Return last status
  1511. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1512. * and then they set their DRQ Bit
  1513. */
  1514. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1515. {
  1516. ulong delay = 10 * t; /* poll every 100 us */
  1517. uchar c;
  1518. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1519. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1520. /* break if error occurs (doesn't make sense to wait more) */
  1521. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1522. break;
  1523. udelay (100);
  1524. if (delay-- == 0) {
  1525. break;
  1526. }
  1527. }
  1528. return (c);
  1529. }
  1530. /*
  1531. * issue an atapi command
  1532. */
  1533. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1534. {
  1535. unsigned char c,err,mask,res;
  1536. int n;
  1537. ide_led (DEVICE_LED(device), 1); /* LED on */
  1538. /* Select device
  1539. */
  1540. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1541. res = 0;
  1542. #ifdef CONFIG_AMIGAONEG3SE
  1543. # warning THF: Removed LBA mode ???
  1544. #endif
  1545. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1546. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1547. if ((c & mask) != res) {
  1548. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1549. err=0xFF;
  1550. goto AI_OUT;
  1551. }
  1552. /* write taskfile */
  1553. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1554. ide_outb (device, ATA_SECT_CNT, 0);
  1555. ide_outb (device, ATA_SECT_NUM, 0);
  1556. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1557. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1558. #ifdef CONFIG_AMIGAONEG3SE
  1559. # warning THF: Removed LBA mode ???
  1560. #endif
  1561. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1562. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1563. udelay (50);
  1564. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1565. res = ATA_STAT_DRQ;
  1566. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1567. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1568. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1569. err=0xFF;
  1570. goto AI_OUT;
  1571. }
  1572. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1573. /* ATAPI Command written wait for completition */
  1574. udelay (5000); /* device must set bsy */
  1575. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1576. /* if no data wait for DRQ = 0 BSY = 0
  1577. * if data wait for DRQ = 1 BSY = 0 */
  1578. res=0;
  1579. if(buflen)
  1580. res = ATA_STAT_DRQ;
  1581. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1582. if ((c & mask) != res ) {
  1583. if (c & ATA_STAT_ERR) {
  1584. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1585. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1586. } else {
  1587. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1588. err=0xFF;
  1589. }
  1590. goto AI_OUT;
  1591. }
  1592. n=ide_inb(device, ATA_CYL_HIGH);
  1593. n<<=8;
  1594. n+=ide_inb(device, ATA_CYL_LOW);
  1595. if(n>buflen) {
  1596. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1597. err=0xff;
  1598. goto AI_OUT;
  1599. }
  1600. if((n==0)&&(buflen<0)) {
  1601. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1602. err=0xff;
  1603. goto AI_OUT;
  1604. }
  1605. if(n!=buflen) {
  1606. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1607. }
  1608. if(n!=0) { /* data transfer */
  1609. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1610. /* we transfer shorts */
  1611. n>>=1;
  1612. /* ok now decide if it is an in or output */
  1613. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1614. debug ("Write to device\n");
  1615. output_data_shorts(device,(unsigned short *)buffer,n);
  1616. } else {
  1617. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1618. input_data_shorts(device,(unsigned short *)buffer,n);
  1619. }
  1620. }
  1621. udelay(5000); /* seems that some CD ROMs need this... */
  1622. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1623. res=0;
  1624. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1625. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1626. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1627. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1628. } else {
  1629. err = 0;
  1630. }
  1631. AI_OUT:
  1632. ide_led (DEVICE_LED(device), 0); /* LED off */
  1633. return (err);
  1634. }
  1635. /*
  1636. * sending the command to atapi_issue. If an status other than good
  1637. * returns, an request_sense will be issued
  1638. */
  1639. #define ATAPI_DRIVE_NOT_READY 100
  1640. #define ATAPI_UNIT_ATTN 10
  1641. unsigned char atapi_issue_autoreq (int device,
  1642. unsigned char* ccb,
  1643. int ccblen,
  1644. unsigned char *buffer,
  1645. int buflen)
  1646. {
  1647. unsigned char sense_data[18],sense_ccb[12];
  1648. unsigned char res,key,asc,ascq;
  1649. int notready,unitattn;
  1650. #ifdef CONFIG_AMIGAONEG3SE
  1651. char *s;
  1652. unsigned int timeout, retrycnt;
  1653. s = getenv("ide_cd_timeout");
  1654. timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
  1655. retrycnt = 0;
  1656. #endif
  1657. unitattn=ATAPI_UNIT_ATTN;
  1658. notready=ATAPI_DRIVE_NOT_READY;
  1659. retry:
  1660. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1661. if (res==0)
  1662. return (0); /* Ok */
  1663. if (res==0xFF)
  1664. return (0xFF); /* error */
  1665. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1666. memset(sense_ccb,0,sizeof(sense_ccb));
  1667. memset(sense_data,0,sizeof(sense_data));
  1668. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1669. sense_ccb[4]=18; /* allocation Length */
  1670. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1671. key=(sense_data[2]&0xF);
  1672. asc=(sense_data[12]);
  1673. ascq=(sense_data[13]);
  1674. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1675. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1676. sense_data[0],
  1677. key,
  1678. asc,
  1679. ascq);
  1680. if((key==0))
  1681. return 0; /* ok device ready */
  1682. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1683. if(unitattn-->0) {
  1684. udelay(200*1000);
  1685. goto retry;
  1686. }
  1687. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1688. goto error;
  1689. }
  1690. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1691. if (notready-->0) {
  1692. udelay(200*1000);
  1693. goto retry;
  1694. }
  1695. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1696. goto error;
  1697. }
  1698. if(asc==0x3a) {
  1699. debug ("Media not present\n");
  1700. goto error;
  1701. }
  1702. #ifdef CONFIG_AMIGAONEG3SE
  1703. if ((sense_data[2]&0xF)==0x0B) {
  1704. debug ("ABORTED COMMAND...retry\n");
  1705. if (retrycnt++ < 4)
  1706. goto retry;
  1707. return (0xFF);
  1708. }
  1709. if ((sense_data[2]&0xf) == 0x02 &&
  1710. sense_data[12] == 0x04 &&
  1711. sense_data[13] == 0x01 ) {
  1712. debug ("Waiting for unit to become active\n");
  1713. udelay(timeout);
  1714. if (retrycnt++ < 4)
  1715. goto retry;
  1716. return 0xFF;
  1717. }
  1718. #endif /* CONFIG_AMIGAONEG3SE */
  1719. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1720. error:
  1721. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1722. return (0xFF);
  1723. }
  1724. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1725. {
  1726. unsigned char ccb[12]; /* Command descriptor block */
  1727. unsigned char iobuf[64]; /* temp buf */
  1728. unsigned char c;
  1729. int device;
  1730. device=dev_desc->dev;
  1731. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1732. dev_desc->block_read=atapi_read;
  1733. memset(ccb,0,sizeof(ccb));
  1734. memset(iobuf,0,sizeof(iobuf));
  1735. ccb[0]=ATAPI_CMD_INQUIRY;
  1736. ccb[4]=40; /* allocation Legnth */
  1737. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1738. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1739. if (c!=0)
  1740. return;
  1741. /* copy device ident strings */
  1742. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1743. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1744. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1745. dev_desc->lun=0;
  1746. dev_desc->lba=0;
  1747. dev_desc->blksz=0;
  1748. dev_desc->type=iobuf[0] & 0x1f;
  1749. if ((iobuf[1]&0x80)==0x80)
  1750. dev_desc->removable = 1;
  1751. else
  1752. dev_desc->removable = 0;
  1753. memset(ccb,0,sizeof(ccb));
  1754. memset(iobuf,0,sizeof(iobuf));
  1755. ccb[0]=ATAPI_CMD_START_STOP;
  1756. ccb[4]=0x03; /* start */
  1757. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1758. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1759. if (c!=0)
  1760. return;
  1761. memset(ccb,0,sizeof(ccb));
  1762. memset(iobuf,0,sizeof(iobuf));
  1763. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1764. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1765. if (c!=0)
  1766. return;
  1767. memset(ccb,0,sizeof(ccb));
  1768. memset(iobuf,0,sizeof(iobuf));
  1769. ccb[0]=ATAPI_CMD_READ_CAP;
  1770. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1771. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1772. if (c!=0)
  1773. return;
  1774. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1775. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1776. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1777. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1778. ((unsigned long)iobuf[1]<<16) +
  1779. ((unsigned long)iobuf[2]<< 8) +
  1780. ((unsigned long)iobuf[3]);
  1781. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1782. ((unsigned long)iobuf[5]<<16) +
  1783. ((unsigned long)iobuf[6]<< 8) +
  1784. ((unsigned long)iobuf[7]);
  1785. #ifdef CONFIG_LBA48
  1786. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1787. #endif
  1788. return;
  1789. }
  1790. /*
  1791. * atapi_read:
  1792. * we transfer only one block per command, since the multiple DRQ per
  1793. * command is not yet implemented
  1794. */
  1795. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1796. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1797. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1798. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1799. {
  1800. ulong n = 0;
  1801. unsigned char ccb[12]; /* Command descriptor block */
  1802. ulong cnt;
  1803. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1804. device, blknr, blkcnt, (ulong)buffer);
  1805. do {
  1806. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1807. cnt=ATAPI_READ_MAX_BLOCK;
  1808. } else {
  1809. cnt=blkcnt;
  1810. }
  1811. ccb[0]=ATAPI_CMD_READ_12;
  1812. ccb[1]=0; /* reserved */
  1813. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1814. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1815. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1816. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1817. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1818. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1819. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1820. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1821. ccb[10]=0; /* reserved */
  1822. ccb[11]=0; /* reserved */
  1823. if (atapi_issue_autoreq(device,ccb,12,
  1824. (unsigned char *)buffer,
  1825. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1826. return (n);
  1827. }
  1828. n+=cnt;
  1829. blkcnt-=cnt;
  1830. blknr+=cnt;
  1831. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1832. } while (blkcnt > 0);
  1833. return (n);
  1834. }
  1835. /* ------------------------------------------------------------------------- */
  1836. #endif /* CONFIG_ATAPI */
  1837. U_BOOT_CMD(
  1838. ide, 5, 1, do_ide,
  1839. "IDE sub-system",
  1840. "reset - reset IDE controller\n"
  1841. "ide info - show available IDE devices\n"
  1842. "ide device [dev] - show or set current device\n"
  1843. "ide part [dev] - print partition table of one or all IDE devices\n"
  1844. "ide read addr blk# cnt\n"
  1845. "ide write addr blk# cnt - read/write `cnt'"
  1846. " blocks starting at block `blk#'\n"
  1847. " to/from memory address `addr'\n"
  1848. );
  1849. U_BOOT_CMD(
  1850. diskboot, 3, 1, do_diskboot,
  1851. "boot from IDE device",
  1852. "loadAddr dev:part\n"
  1853. );