ebi_smc911x.c 2.8 KB

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  1. /*
  2. * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. */
  19. #include <common.h>
  20. #include <netdev.h>
  21. #include <asm/io.h>
  22. #include "vct.h"
  23. /*
  24. * EBI initialization for SMC911x access
  25. */
  26. int ebi_init_smc911x(void)
  27. {
  28. reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020);
  29. reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
  30. reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100);
  31. reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111);
  32. reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000);
  33. reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
  34. reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100);
  35. reg_write(EBI_DEV1_TIM1_WR2(EBI_BASE), 0x3FC21110);
  36. return 0;
  37. }
  38. /*
  39. * Accessor functions replacing the "weak" functions in
  40. * drivers/net/smc911x.c
  41. */
  42. u32 smc911x_reg_read(struct eth_device *dev, u32 addr)
  43. {
  44. volatile u32 data;
  45. addr += dev->iobase;
  46. reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
  47. ebi_wait();
  48. reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
  49. ebi_wait();
  50. data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
  51. return (data);
  52. }
  53. void smc911x_reg_write(struct eth_device *dev, u32 addr, u32 data)
  54. {
  55. addr += dev->iobase;
  56. reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
  57. ebi_wait();
  58. reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
  59. reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
  60. EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
  61. ebi_wait();
  62. }
  63. void pkt_data_push(struct eth_device *dev, u32 addr, u32 data)
  64. {
  65. addr += dev->iobase;
  66. reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
  67. ebi_wait();
  68. reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
  69. reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
  70. EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
  71. ebi_wait();
  72. return;
  73. }
  74. u32 pkt_data_pull(struct eth_device *dev, u32 addr)
  75. {
  76. volatile u32 data;
  77. addr += dev->iobase;
  78. reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
  79. ebi_wait();
  80. reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
  81. ebi_wait();
  82. data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
  83. return data;
  84. }
  85. int board_eth_init(bd_t *bis)
  86. {
  87. int rc = 0;
  88. #ifdef CONFIG_SMC911X
  89. rc = smc911x_initialize(0, CONFIG_DRIVER_SMC911X_BASE);
  90. #endif
  91. return rc;
  92. }