bf561-ezkit.h 7.2 KB

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  1. /*
  2. * U-boot - Configuration file for BF561 EZKIT board
  3. */
  4. #ifndef __CONFIG_EZKIT561_H__
  5. #define __CONFIG_EZKIT561_H__
  6. #define CONFIG_VDSP 1
  7. #define CONFIG_BF561 1
  8. #define CFG_LONGHELP 1
  9. #define CONFIG_CMDLINE_EDITING 1
  10. #define CONFIG_BAUDRATE 57600
  11. /* Set default serial console for bf537 */
  12. #define CONFIG_UART_CONSOLE 0
  13. #define CONFIG_EZKIT561 1
  14. #define CONFIG_BOOTDELAY 5
  15. #define CONFIG_PANIC_HANG 1
  16. /*
  17. * Boot Mode Set
  18. * Blackfin can support several boot modes
  19. */
  20. #define BF561_BYPASS_BOOT 0x21
  21. #define BF561_PARA_BOOT 0x22
  22. #define BF561_SPI_BOOT 0x24
  23. /* Define the boot mode */
  24. #define BFIN_BOOT_MODE BF561_BYPASS_BOOT
  25. /* This sets the default state of the cache on U-Boot's boot */
  26. #define CONFIG_ICACHE_ON
  27. #define CONFIG_DCACHE_ON
  28. /* Define where the uboot will be loaded by on-chip boot rom */
  29. #define APP_ENTRY 0x00001000
  30. /*
  31. * Stringize definitions - needed for environmental settings
  32. */
  33. #define STRINGIZE2(x) #x
  34. #define STRINGIZE(x) STRINGIZE2(x)
  35. /*
  36. * Board settings
  37. */
  38. #define CONFIG_DRIVER_SMC91111 1
  39. #define CONFIG_SMC91111_BASE 0x2C010300
  40. #define CONFIG_ASYNC_EBIU_BASE CONFIG_SMC91111_BASE & ~(4*1024*1024)
  41. #define CONFIG_SMC_USE_32_BIT 1
  42. #define CONFIG_MISC_INIT_R 1
  43. /*
  44. * Clock settings
  45. */
  46. /* CONFIG_CLKIN_HZ is any value in Hz */
  47. #define CONFIG_CLKIN_HZ 30000000
  48. /* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */
  49. /* 1=CLKIN/2 */
  50. #define CONFIG_CLKIN_HALF 0
  51. /* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */
  52. /* 1=bypass PLL */
  53. #define CONFIG_PLL_BYPASS 0
  54. /* CONFIG_VCO_MULT controls what the multiplier of the PLL is */
  55. /* Values can range from 1-64 */
  56. #define CONFIG_VCO_MULT 20
  57. /* CONFIG_CCLK_DIV controls what the core clock divider is */
  58. /* Values can be 1, 2, 4, or 8 ONLY */
  59. #define CONFIG_CCLK_DIV 1
  60. /* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
  61. /* Values can range from 1-15 */
  62. #define CONFIG_SCLK_DIV 5
  63. /* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */
  64. /* Values can range from 2-65535 */
  65. /* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */
  66. #define CONFIG_SPI_BAUD 2
  67. #define CONFIG_SPI_BAUD_INITBLOCK 4
  68. /*
  69. * Network settings
  70. */
  71. #if (CONFIG_DRIVER_SMC91111)
  72. #define CONFIG_IPADDR 192.168.0.15
  73. #define CONFIG_NETMASK 255.255.255.0
  74. #define CONFIG_GATEWAYIP 192.168.0.1
  75. #define CONFIG_SERVERIP 192.168.0.2
  76. #define CONFIG_HOSTNAME ezkit561
  77. #define CONFIG_ROOTPATH /arm-cross-build/BF561/uClinux-dist/romfs
  78. #endif /* CONFIG_DRIVER_SMC91111 */
  79. /*
  80. * Flash settings
  81. */
  82. #define CFG_FLASH_CFI /* The flash is CFI compatible */
  83. #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
  84. #define CFG_FLASH_CFI_AMD_RESET
  85. #define CFG_ENV_IS_IN_FLASH 1
  86. #define CFG_FLASH_BASE 0x20000000
  87. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  88. #define CFG_MAX_FLASH_SECT 135 /* max number of sectors on one chip */
  89. #define CFG_ENV_ADDR 0x20020000
  90. #define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
  91. /* JFFS Partition offset set */
  92. #define CFG_JFFS2_FIRST_BANK 0
  93. #define CFG_JFFS2_NUM_BANKS 1
  94. /* 512k reserved for u-boot */
  95. #define CFG_JFFS2_FIRST_SECTOR 8
  96. /*
  97. * SDRAM settings & memory map
  98. */
  99. #define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
  100. #define CONFIG_MEM_ADD_WDTH 9 /* 8, 9, 10, 11 */
  101. #define CONFIG_MEM_MT48LC16M16A2TG_75 1
  102. #define CFG_SDRAM_BASE 0x00000000
  103. #define CFG_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
  104. #define CFG_MEMTEST_START 0x0 /* memtest works on */
  105. #define CFG_MEMTEST_END ( (CONFIG_MEM_SIZE - 1) * 1024*1024) /* 1 ... 63 MB in DRAM */
  106. #define CONFIG_LOADADDR 0x01000000 /* default load address */
  107. #define CFG_LOAD_ADDR CONFIG_LOADADDR
  108. #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  109. #define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN)
  110. #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
  111. #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
  112. #define CFG_GBL_DATA_SIZE 0x4000
  113. #define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
  114. #define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4)
  115. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  116. #if ( CONFIG_CLKIN_HALF == 0 )
  117. #define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
  118. #else
  119. #define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 )
  120. #endif
  121. #if (CONFIG_PLL_BYPASS == 0)
  122. #define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV )
  123. #define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV )
  124. #else
  125. #define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
  126. #define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
  127. #endif
  128. /*
  129. * Command settings
  130. */
  131. #define CFG_AUTOLOAD "no" /* rarpb, bootp, dhcp commands will */
  132. /* only perform a configuration */
  133. /* lookup from the BOOTP/DHCP server */
  134. /* but not try to load any image */
  135. /* using TFTP */
  136. #define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, */
  137. /* currently its disabled */
  138. #define CONFIG_BOOTCOMMAND "run ramboot"
  139. #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600"
  140. #if (CONFIG_DRIVER_SMC91111)
  141. #define CONFIG_EXTRA_ENV_SETTINGS \
  142. "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
  143. "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \
  144. "$(rootpath) console=ttyBF0,57600\0" \
  145. "addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \
  146. "$(gatewayip):$(netmask):$(hostname):eth0:off\0" \
  147. "ramboot=tftpboot $(loadaddr) linux; " \
  148. "run ramargs; run addip; bootelf\0" \
  149. "nfsboot=tftpboot $(loadaddr) linux; " \
  150. "run nfsargs; run addip; bootelf\0" \
  151. "update=tftpboot $(loadaddr) u-boot.bin; " \
  152. "protect off 0x20000000 0x2003FFFF; " \
  153. "erase 0x20000000 0x2003FFFF; " \
  154. "cp.b $(loadaddr) 0x20000000 $(filesize)\0" \
  155. ""
  156. #else
  157. #define CONFIG_EXTRA_ENV_SETTINGS \
  158. "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
  159. "flashboot=bootm 0x20100000\0" \
  160. ""
  161. #endif
  162. /*
  163. * BOOTP options
  164. */
  165. #define CONFIG_BOOTP_BOOTFILESIZE
  166. #define CONFIG_BOOTP_BOOTPATH
  167. #define CONFIG_BOOTP_GATEWAY
  168. #define CONFIG_BOOTP_HOSTNAME
  169. /*
  170. * Command line configuration.
  171. */
  172. #include <config_cmd_default.h>
  173. #define CONFIG_CMD_ELF
  174. #define CONFIG_CMD_CACHE
  175. #define CONFIG_CMD_JFFS2
  176. #if defined(CONFIG_DRIVER_SMC91111)
  177. #define CONFIG_CMD_PING
  178. #define CONFIG_CMD_DHCP
  179. #endif
  180. /*
  181. * Console settings
  182. */
  183. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  184. #define CFG_PROMPT "ezkit> " /* Monitor Command Prompt */
  185. #if defined(CONFIG_CMD_KGDB)
  186. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  187. #else
  188. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  189. #endif
  190. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  191. #define CFG_MAXARGS 16 /* max number of command args */
  192. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  193. #define CONFIG_LOADS_ECHO 1
  194. /*
  195. * Miscellaneous configurable options
  196. */
  197. #define CFG_HZ 1000 /* decrementer freq: 10 ms ticks */
  198. #define CFG_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */
  199. /*
  200. * FLASH organization and environment definitions
  201. */
  202. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  203. #define AMGCTLVAL 0x3F
  204. #define AMBCTL0VAL 0x7BB07BB0
  205. #define AMBCTL1VAL 0xFFC27BB0
  206. #ifdef CONFIG_VDSP
  207. #define ET_EXEC_VDSP 0x8
  208. #define SHT_STRTAB_VDSP 0x1
  209. #define ELFSHDRSIZE_VDSP 0x2C
  210. #define VDSP_ENTRY_ADDR 0xFFA00000
  211. #endif
  212. #endif /* __CONFIG_EZKIT561_H__ */