TQM5200.h 21 KB

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  1. /*
  2. * (C) Copyright 2003-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2004-2006
  6. * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * High Level Configuration Options
  30. * (easy to change)
  31. */
  32. #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
  33. #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
  34. #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
  35. #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
  36. /* On a Cameron or on a FO300 board or ... */
  37. #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
  38. #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
  39. #endif
  40. #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
  41. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  42. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  43. /*
  44. * Serial console configuration
  45. */
  46. #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
  47. #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
  48. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
  49. #ifdef CONFIG_FO300
  50. #define CFG_DEVICE_NULLDEV 1 /* enable null device */
  51. #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
  52. #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
  53. #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
  54. #if 0
  55. #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
  56. /* switch is closed */
  57. #endif
  58. #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
  59. /* switch is open */
  60. #endif /* CONFIG_FO300 */
  61. #ifdef CONFIG_STK52XX
  62. #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
  63. #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
  64. #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
  65. #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
  66. #define CONFIG_BOARD_EARLY_INIT_R
  67. #endif /* CONFIG_STK52XX */
  68. /*
  69. * PCI Mapping:
  70. * 0x40000000 - 0x4fffffff - PCI Memory
  71. * 0x50000000 - 0x50ffffff - PCI IO Space
  72. */
  73. #ifdef CONFIG_STK52XX
  74. #define CONFIG_PCI 1
  75. #define CONFIG_PCI_PNP 1
  76. /* #define CONFIG_PCI_SCAN_SHOW 1 */
  77. #define CONFIG_PCI_MEM_BUS 0x40000000
  78. #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
  79. #define CONFIG_PCI_MEM_SIZE 0x10000000
  80. #define CONFIG_PCI_IO_BUS 0x50000000
  81. #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
  82. #define CONFIG_PCI_IO_SIZE 0x01000000
  83. #define CONFIG_NET_MULTI 1
  84. #define CONFIG_EEPRO100 1
  85. #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
  86. #define CONFIG_NS8382X 1
  87. #endif /* CONFIG_STK52XX */
  88. /*
  89. * Video console
  90. */
  91. #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
  92. #define CONFIG_VIDEO
  93. #define CONFIG_VIDEO_SM501
  94. #define CONFIG_VIDEO_SM501_32BPP
  95. #define CONFIG_CFB_CONSOLE
  96. #define CONFIG_VIDEO_LOGO
  97. #ifndef CONFIG_FO300
  98. #define CONFIG_CONSOLE_EXTRA_INFO
  99. #else
  100. #define CONFIG_VIDEO_BMP_LOGO
  101. #endif
  102. #define CONFIG_VGA_AS_SINGLE_DEVICE
  103. #define CONFIG_VIDEO_SW_CURSOR
  104. #define CONFIG_SPLASH_SCREEN
  105. #define CFG_CONSOLE_IS_IN_ENV
  106. #endif /* #ifndef CONFIG_TQM5200S */
  107. /* Partitions */
  108. #define CONFIG_MAC_PARTITION
  109. #define CONFIG_DOS_PARTITION
  110. #define CONFIG_ISO_PARTITION
  111. /* USB */
  112. #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
  113. #define CONFIG_USB_OHCI_NEW
  114. #define CFG_OHCI_BE_CONTROLLER
  115. #define CONFIG_USB_STORAGE
  116. #define CONFIG_CMD_FAT
  117. #define CONFIG_CMD_USB
  118. #undef CFG_USB_OHCI_BOARD_INIT
  119. #define CFG_USB_OHCI_CPU_INIT
  120. #define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
  121. #define CFG_USB_OHCI_SLOT_NAME "mpc5200"
  122. #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
  123. #endif
  124. #ifndef CONFIG_CAM5200
  125. /* POST support */
  126. #define CONFIG_POST (CFG_POST_MEMORY | \
  127. CFG_POST_CPU | \
  128. CFG_POST_I2C)
  129. #endif
  130. #ifdef CONFIG_POST
  131. /* preserve space for the post_word at end of on-chip SRAM */
  132. #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
  133. #endif
  134. /*
  135. * BOOTP options
  136. */
  137. #define CONFIG_BOOTP_BOOTFILESIZE
  138. #define CONFIG_BOOTP_BOOTPATH
  139. #define CONFIG_BOOTP_GATEWAY
  140. #define CONFIG_BOOTP_HOSTNAME
  141. /*
  142. * Command line configuration.
  143. */
  144. #include <config_cmd_default.h>
  145. #define CONFIG_CMD_ASKENV
  146. #define CONFIG_CMD_DATE
  147. #define CONFIG_CMD_DHCP
  148. #define CONFIG_CMD_EEPROM
  149. #define CONFIG_CMD_I2C
  150. #define CONFIG_CMD_JFFS2
  151. #define CONFIG_CMD_MII
  152. #define CONFIG_CMD_NFS
  153. #define CONFIG_CMD_PING
  154. #define CONFIG_CMD_REGINFO
  155. #define CONFIG_CMD_SNTP
  156. #define CONFIG_CMD_BSP
  157. #ifdef CONFIG_VIDEO
  158. #define CONFIG_CMD_BMP
  159. #endif
  160. #ifdef CONFIG_PCI
  161. #define CONFIG_CMD_PCI
  162. #endif
  163. #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
  164. #define CONFIG_CMD_IDE
  165. #define CONFIG_CMD_FAT
  166. #define CONFIG_CMD_EXT2
  167. #endif
  168. #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
  169. #define CONFIG_CFG_USB
  170. #define CONFIG_CFG_FAT
  171. #endif
  172. #ifdef CONFIG_POST
  173. #define CONFIG_CMD_DIAG
  174. #endif
  175. #define CONFIG_TIMESTAMP /* display image timestamps */
  176. #if (TEXT_BASE != 0xFFF00000)
  177. # define CFG_LOWBOOT 1 /* Boot low */
  178. #endif
  179. /*
  180. * Autobooting
  181. */
  182. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  183. #define CONFIG_PREBOOT "echo;" \
  184. "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  185. "echo"
  186. #undef CONFIG_BOOTARGS
  187. #if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
  188. # define ENV_UPDT \
  189. "update=protect off FFF00000 +${filesize};" \
  190. "erase FFF00000 +${filesize};" \
  191. "cp.b 200000 FFF00000 ${filesize};" \
  192. "protect on FFF00000 +${filesize}\0"
  193. #else /* default lowboot configuration */
  194. # define ENV_UPDT \
  195. "update=protect off FC000000 +${filesize};" \
  196. "erase FC000000 +${filesize};" \
  197. "cp.b 200000 FC000000 ${filesize};" \
  198. "protect on FC000000 +${filesize}\0"
  199. #endif
  200. #if defined(CONFIG_TQM5200)
  201. #define CUSTOM_ENV_SETTINGS \
  202. "hostname=tqm5200\0" \
  203. "bootfile=/tftpboot/tqm5200/uImage\0" \
  204. "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
  205. "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
  206. #elif defined(CONFIG_CAM5200)
  207. #define CUSTOM_ENV_SETTINGS \
  208. "bootfile=cam5200/uImage\0" \
  209. "u-boot=cam5200/u-boot.bin\0" \
  210. "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
  211. #endif
  212. #define CONFIG_EXTRA_ENV_SETTINGS \
  213. "netdev=eth0\0" \
  214. "console=ttyPSC0\0" \
  215. "fdt_addr=FC0A0000\0" \
  216. "kernel_addr=FC0C0000\0" \
  217. "ramdisk_addr=FC300000\0" \
  218. "kernel_addr_r=400000\0" \
  219. "fdt_addr_r=600000\0" \
  220. "rootpath=/opt/eldk/ppc_6xx\0" \
  221. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  222. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  223. "nfsroot=${serverip}:${rootpath}\0" \
  224. "addip=setenv bootargs ${bootargs} " \
  225. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  226. ":${hostname}:${netdev}:off panic=1\0" \
  227. "addcons=setenv bootargs ${bootargs} " \
  228. "console=${console},${baudrate}\0" \
  229. "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
  230. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  231. "flash_self=run ramargs addip addcons;" \
  232. "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
  233. "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
  234. "bootm ${kernel_addr}\0" \
  235. "flash_nfs=run nfsargs addip addcons;" \
  236. "bootm ${kernel_addr} - ${fdt_addr}\0" \
  237. "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
  238. "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
  239. "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
  240. "tftp ${fdt_addr_r} ${fdt_file}; " \
  241. "run nfsargs addip addcons; " \
  242. "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
  243. CUSTOM_ENV_SETTINGS \
  244. "load=tftp 200000 ${u-boot}\0" \
  245. ENV_UPDT \
  246. ""
  247. #define CONFIG_BOOTCOMMAND "run net_nfs"
  248. /*
  249. * IPB Bus clocking configuration.
  250. */
  251. #define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
  252. #if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
  253. /*
  254. * PCI Bus clocking configuration
  255. *
  256. * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
  257. * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
  258. * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
  259. */
  260. #define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
  261. #endif
  262. /*
  263. * I2C configuration
  264. */
  265. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  266. #ifdef CONFIG_TQM5200_REV100
  267. #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
  268. #else
  269. #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
  270. #endif
  271. /*
  272. * I2C clock frequency
  273. *
  274. * Please notice, that the resulting clock frequency could differ from the
  275. * configured value. This is because the I2C clock is derived from system
  276. * clock over a frequency divider with only a few divider values. U-boot
  277. * calculates the best approximation for CFG_I2C_SPEED. However the calculated
  278. * approximation allways lies below the configured value, never above.
  279. */
  280. #define CFG_I2C_SPEED 100000 /* 100 kHz */
  281. #define CFG_I2C_SLAVE 0x7F
  282. /*
  283. * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
  284. * also). For other EEPROMs configuration should be verified. On Mini-FAP the
  285. * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
  286. * same configuration could be used.
  287. */
  288. #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
  289. #define CFG_I2C_EEPROM_ADDR_LEN 2
  290. #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
  291. #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
  292. /*
  293. * HW-Monitor configuration on Mini-FAP
  294. */
  295. #if defined (CONFIG_MINIFAP)
  296. #define CFG_I2C_HWMON_ADDR 0x2C
  297. #endif
  298. /* List of I2C addresses to be verified by POST */
  299. #if defined (CONFIG_MINIFAP)
  300. #undef I2C_ADDR_LIST
  301. #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
  302. CFG_I2C_HWMON_ADDR, \
  303. CFG_I2C_SLAVE }
  304. #endif
  305. /*
  306. * Flash configuration
  307. */
  308. #define CFG_FLASH_BASE 0xFC000000
  309. #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
  310. #define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
  311. (= chip selects) */
  312. #define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
  313. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  314. #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  315. #define CFG_FLASH_ADDR0 0x555
  316. #define CFG_FLASH_ADDR1 0x2AA
  317. #define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
  318. #define CFG_MAX_FLASH_SECT 128
  319. #else
  320. /* use CFI flash driver */
  321. #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
  322. #define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
  323. #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
  324. #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
  325. (= chip selects) */
  326. #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
  327. #endif
  328. #define CFG_FLASH_EMPTY_INFO
  329. #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
  330. #define CFG_FLASH_USE_BUFFER_WRITE 1
  331. #if defined (CONFIG_CAM5200)
  332. # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
  333. #elif defined(CONFIG_TQM5200_B)
  334. # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
  335. #else
  336. # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
  337. #endif
  338. /* Dynamic MTD partition support */
  339. #define CONFIG_JFFS2_CMDLINE
  340. #define MTDIDS_DEFAULT "nor0=TQM5200-0"
  341. #ifdef CONFIG_STK52XX
  342. # if defined(CONFIG_TQM5200_B)
  343. # if defined(CFG_LOWBOOT)
  344. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
  345. "1536k(kernel)," \
  346. "3584k(small-fs)," \
  347. "2m(initrd)," \
  348. "8m(misc)," \
  349. "16m(big-fs)"
  350. # else /* highboot */
  351. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
  352. "3584k(small-fs)," \
  353. "2m(initrd)," \
  354. "8m(misc)," \
  355. "15m(big-fs)," \
  356. "1m(firmware)"
  357. # endif /* CFG_LOWBOOT */
  358. # else /* !CONFIG_TQM5200_B */
  359. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
  360. "128k(dtb)," \
  361. "2304k(kernel)," \
  362. "2m(initrd)," \
  363. "4m(small-fs)," \
  364. "8m(misc)," \
  365. "15m(big-fs)"
  366. # endif /* CONFIG_TQM5200_B */
  367. #elif defined (CONFIG_CAM5200)
  368. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
  369. "1792k(kernel)," \
  370. "5632k(rootfs)," \
  371. "24m(home)"
  372. #elif defined (CONFIG_FO300)
  373. # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
  374. "1408k(kernel)," \
  375. "2m(initrd)," \
  376. "4m(small-fs)," \
  377. "8m(misc)," \
  378. "16m(big-fs)"
  379. #else
  380. # error "Unknown Carrier Board"
  381. #endif /* CONFIG_STK52XX */
  382. /*
  383. * Environment settings
  384. */
  385. #define CFG_ENV_IS_IN_FLASH 1
  386. #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
  387. #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
  388. #define CFG_ENV_SECT_SIZE 0x40000
  389. #else
  390. #define CFG_ENV_SECT_SIZE 0x20000
  391. #endif /* CONFIG_TQM5200_B */
  392. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
  393. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  394. /*
  395. * Memory map
  396. */
  397. #define CFG_MBAR 0xF0000000
  398. #define CFG_SDRAM_BASE 0x00000000
  399. #define CFG_DEFAULT_MBAR 0x80000000
  400. /* Use ON-Chip SRAM until RAM will be available */
  401. #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
  402. #ifdef CONFIG_POST
  403. /* preserve space for the post_word at end of on-chip SRAM */
  404. #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
  405. #else
  406. #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
  407. #endif
  408. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  409. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  410. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  411. #define CFG_MONITOR_BASE TEXT_BASE
  412. #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
  413. # define CFG_RAMBOOT 1
  414. #endif
  415. #if defined (CONFIG_CAM5200)
  416. # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  417. #elif defined(CONFIG_TQM5200_B)
  418. # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
  419. #else
  420. # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
  421. #endif
  422. #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
  423. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  424. /*
  425. * Ethernet configuration
  426. */
  427. #define CONFIG_MPC5xxx_FEC 1
  428. /*
  429. * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
  430. */
  431. /* #define CONFIG_FEC_10MBIT 1 */
  432. #define CONFIG_PHY_ADDR 0x00
  433. /*
  434. * GPIO configuration
  435. *
  436. * use CS1: Bit 0 (mask: 0x80000000):
  437. * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
  438. * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
  439. * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
  440. * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
  441. * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
  442. * Use for REV200 STK52XX boards and FO300 boards. Do not use
  443. * with REV100 modules (because, there I2C1 is used as I2C bus).
  444. * use ATA: Bits 6-7 (mask 0x03000000):
  445. * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
  446. * Use for CAM5200 board.
  447. * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
  448. * use PSC6: Bits 9-11 (mask 0x00700000):
  449. * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
  450. * UART, CODEC or IrDA.
  451. * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
  452. * enable extended POST tests.
  453. * Use for MINI-FAP and TQM5200_IB boards.
  454. * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
  455. * Extended POST test is not available.
  456. * Use for STK52xx, FO300 and CAM5200 boards.
  457. * use PCI_DIS: Bit 16 (mask 0x00008000):
  458. * 1 -> disable PCI controller (on CAM5200 board).
  459. * use USB: Bits 18-19 (mask 0x00003000):
  460. * 10 -> two UARTs (on FO300 and CAM5200).
  461. * use PSC3: Bits 20-23 (mask: 0x00000f00):
  462. * 0000 -> All PSC3 pins are GPIOs.
  463. * 1100 -> UART/SPI (on FO300 board).
  464. * 0100 -> UART (on CAM5200 board).
  465. * use PSC2: Bits 25:27 (mask: 0x00000030):
  466. * 000 -> All PSC2 pins are GPIOs.
  467. * 100 -> UART (on CAM5200 board).
  468. * 001 -> CAN1/2 on PSC2 pins.
  469. * Use for REV100 STK52xx boards
  470. * 01x -> Use AC97 (on FO300 board).
  471. * use PSC1: Bits 29-31 (mask: 0x00000007):
  472. * 100 -> UART (on all boards).
  473. */
  474. #if defined (CONFIG_MINIFAP)
  475. # define CFG_GPS_PORT_CONFIG 0x91000004
  476. #elif defined (CONFIG_STK52XX)
  477. # if defined (CONFIG_STK52XX_REV100)
  478. # define CFG_GPS_PORT_CONFIG 0x81500014
  479. # else /* STK52xx REV200 and above */
  480. # if defined (CONFIG_TQM5200_REV100)
  481. # error TQM5200 REV100 not supported on STK52XX REV200 or above
  482. # else/* TQM5200 REV200 and above */
  483. # define CFG_GPS_PORT_CONFIG 0x91500404
  484. # endif
  485. # endif
  486. #elif defined (CONFIG_FO300)
  487. # define CFG_GPS_PORT_CONFIG 0x91502c24
  488. #elif defined (CONFIG_CAM5200)
  489. # define CFG_GPS_PORT_CONFIG 0x8050A444
  490. #else /* TMQ5200 Inbetriebnahme-Board */
  491. # define CFG_GPS_PORT_CONFIG 0x81000004
  492. #endif
  493. /*
  494. * RTC configuration
  495. */
  496. #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
  497. # define CONFIG_RTC_M41T11 1
  498. # define CFG_I2C_RTC_ADDR 0x68
  499. # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
  500. year */
  501. #else
  502. # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
  503. #endif
  504. /*
  505. * Miscellaneous configurable options
  506. */
  507. #define CFG_LONGHELP /* undef to save memory */
  508. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  509. #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
  510. #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
  511. #define CFG_PROMPT_HUSH_PS2 "> "
  512. #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
  513. #if defined(CONFIG_CMD_KGDB)
  514. #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  515. #endif
  516. #if defined(CONFIG_CMD_KGDB)
  517. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  518. #else
  519. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  520. #endif
  521. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  522. #define CFG_MAXARGS 16 /* max number of command args */
  523. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  524. /* Enable an alternate, more extensive memory test */
  525. #define CFG_ALT_MEMTEST
  526. #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
  527. #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
  528. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  529. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  530. /*
  531. * Enable loopw command.
  532. */
  533. #define CONFIG_LOOPW
  534. /*
  535. * Various low-level settings
  536. */
  537. #if defined(CONFIG_MPC5200)
  538. #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
  539. #define CFG_HID0_FINAL HID0_ICE
  540. #else
  541. #define CFG_HID0_INIT 0
  542. #define CFG_HID0_FINAL 0
  543. #endif
  544. #define CFG_BOOTCS_START CFG_FLASH_BASE
  545. #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
  546. #ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
  547. #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
  548. #else
  549. #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
  550. #endif
  551. #define CFG_CS0_START CFG_FLASH_BASE
  552. #define CFG_CS0_SIZE CFG_FLASH_SIZE
  553. #define CONFIG_LAST_STAGE_INIT
  554. /*
  555. * SRAM - Do not map below 2 GB in address space, because this area is used
  556. * for SDRAM autosizing.
  557. */
  558. #define CFG_CS2_START 0xE5000000
  559. #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
  560. #define CFG_CS2_CFG 0x0004D930
  561. /*
  562. * Grafic controller - Do not map below 2 GB in address space, because this
  563. * area is used for SDRAM autosizing.
  564. */
  565. #define SM501_FB_BASE 0xE0000000
  566. #define CFG_CS1_START (SM501_FB_BASE)
  567. #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
  568. #define CFG_CS1_CFG 0x8F48FF70
  569. #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
  570. #define CFG_CS_BURST 0x00000000
  571. #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
  572. #if defined(CONFIG_CAM5200)
  573. #define CFG_CS4_START 0xB0000000
  574. #define CFG_CS4_SIZE 0x00010000
  575. #define CFG_CS4_CFG 0x01019C10
  576. #define CFG_CS5_START 0xD0000000
  577. #define CFG_CS5_SIZE 0x01208000
  578. #define CFG_CS5_CFG 0x1414BF10
  579. #endif
  580. #define CFG_RESET_ADDRESS 0xff000000
  581. /*-----------------------------------------------------------------------
  582. * USB stuff
  583. *-----------------------------------------------------------------------
  584. */
  585. #define CONFIG_USB_CLOCK 0x0001BBBB
  586. #define CONFIG_USB_CONFIG 0x00001000
  587. /*-----------------------------------------------------------------------
  588. * IDE/ATA stuff Supports IDE harddisk
  589. *-----------------------------------------------------------------------
  590. */
  591. #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
  592. #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
  593. #undef CONFIG_IDE_LED /* LED for ide not supported */
  594. #define CONFIG_IDE_RESET /* reset for ide supported */
  595. #define CONFIG_IDE_PREINIT
  596. #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
  597. #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
  598. #define CFG_ATA_IDE0_OFFSET 0x0000
  599. #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
  600. /* Offset for data I/O */
  601. #define CFG_ATA_DATA_OFFSET (0x0060)
  602. /* Offset for normal register accesses */
  603. #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
  604. /* Offset for alternate registers */
  605. #define CFG_ATA_ALT_OFFSET (0x005C)
  606. /* Interval between registers */
  607. #define CFG_ATA_STRIDE 4
  608. /*-----------------------------------------------------------------------
  609. * Open firmware flat tree support
  610. *-----------------------------------------------------------------------
  611. */
  612. #define CONFIG_OF_LIBFDT 1
  613. #define CONFIG_OF_BOARD_SETUP 1
  614. #define OF_CPU "PowerPC,5200@0"
  615. #define OF_SOC "soc5200@f0000000"
  616. #define OF_TBCLK (bd->bi_busfreq / 4)
  617. #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
  618. #endif /* __CONFIG_H */