tx25.c 4.4 KB

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  1. /*
  2. * (C) Copyright 2009 DENX Software Engineering
  3. * Author: John Rigby <jrigby@gmail.com>
  4. *
  5. * Based on imx27lite.c:
  6. * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
  7. * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
  8. * And:
  9. * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. *
  26. */
  27. #include <common.h>
  28. #include <asm/io.h>
  29. #include <asm/arch/imx-regs.h>
  30. #include <asm/arch/imx25-pinmux.h>
  31. #include <asm/gpio.h>
  32. #include <asm/arch/sys_proto.h>
  33. DECLARE_GLOBAL_DATA_PTR;
  34. #ifdef CONFIG_FEC_MXC
  35. #define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7)
  36. #define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9)
  37. void tx25_fec_init(void)
  38. {
  39. struct iomuxc_mux_ctl *muxctl;
  40. struct iomuxc_pad_ctl *padctl;
  41. u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
  42. u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
  43. debug("tx25_fec_init\n");
  44. /*
  45. * fec pin init is generic
  46. */
  47. mx25_fec_init_pins();
  48. /*
  49. * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
  50. *
  51. * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
  52. * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
  53. */
  54. muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
  55. padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
  56. writel(gpio_mux_mode, &muxctl->pad_d13);
  57. writel(gpio_mux_mode, &muxctl->pad_d11);
  58. writel(0x0, &padctl->pad_d13);
  59. writel(0x0, &padctl->pad_d11);
  60. /* drop PHY power and assert reset (low) */
  61. gpio_direction_output(GPIO_FEC_RESET_B, 0);
  62. gpio_direction_output(GPIO_FEC_ENABLE_B, 0);
  63. mdelay(5);
  64. debug("resetting phy\n");
  65. /* turn on PHY power leaving reset asserted */
  66. gpio_set_value(GPIO_FEC_ENABLE_B, 1);
  67. mdelay(10);
  68. /*
  69. * Setup some strapping pins that are latched by the PHY
  70. * as reset goes high.
  71. *
  72. * Set PHY mode to 111
  73. * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
  74. * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
  75. * mode2 is tied high so nothing to do
  76. *
  77. * Turn on RMII mode
  78. * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
  79. */
  80. /*
  81. * save three current mux modes and set each to gpio mode
  82. */
  83. saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
  84. saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
  85. saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
  86. writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
  87. writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
  88. writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
  89. /*
  90. * set each to 1 and make each an output
  91. */
  92. gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 10), 1);
  93. gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 11), 1);
  94. gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 12), 1);
  95. mdelay(22); /* this value came from RedBoot */
  96. /*
  97. * deassert PHY reset
  98. */
  99. gpio_set_value(GPIO_FEC_RESET_B, 1);
  100. mdelay(5);
  101. /*
  102. * set FEC pins back
  103. */
  104. writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
  105. writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
  106. writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
  107. }
  108. #else
  109. #define tx25_fec_init()
  110. #endif
  111. int board_init()
  112. {
  113. #ifdef CONFIG_MXC_UART
  114. mx25_uart1_init_pins();
  115. #endif
  116. /* board id for linux */
  117. gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  118. return 0;
  119. }
  120. int board_late_init(void)
  121. {
  122. tx25_fec_init();
  123. return 0;
  124. }
  125. int dram_init(void)
  126. {
  127. /* dram_init must store complete ramsize in gd->ram_size */
  128. gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
  129. PHYS_SDRAM_1_SIZE);
  130. return 0;
  131. }
  132. void dram_init_banksize(void)
  133. {
  134. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  135. gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
  136. PHYS_SDRAM_1_SIZE);
  137. #if CONFIG_NR_DRAM_BANKS > 1
  138. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  139. gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
  140. PHYS_SDRAM_2_SIZE);
  141. #else
  142. #endif
  143. }
  144. int checkboard(void)
  145. {
  146. printf("KARO TX25\n");
  147. return 0;
  148. }