integrator.c 4.0 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * (C) Copyright 2004
  14. * ARM Ltd.
  15. * Philippe Robin, <philippe.robin@arm.com>
  16. *
  17. * See file CREDITS for list of people who contributed to this
  18. * project.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33. * MA 02111-1307 USA
  34. */
  35. #include <common.h>
  36. #include <netdev.h>
  37. #include <asm/io.h>
  38. #include "arm-ebi.h"
  39. DECLARE_GLOBAL_DATA_PTR;
  40. void peripheral_power_enable (void);
  41. #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  42. void show_boot_progress(int progress)
  43. {
  44. printf("Boot reached stage %d\n", progress);
  45. }
  46. #endif
  47. #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  48. /*
  49. * Miscellaneous platform dependent initialisations
  50. */
  51. int board_init (void)
  52. {
  53. u32 val;
  54. /* arch number of Integrator Board */
  55. #ifdef CONFIG_ARCH_CINTEGRATOR
  56. gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
  57. #else
  58. gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
  59. #endif
  60. /* adress of boot parameters */
  61. gd->bd->bi_boot_params = 0x00000100;
  62. gd->flags = 0;
  63. #ifdef CONFIG_CM_REMAP
  64. extern void cm_remap(void);
  65. cm_remap(); /* remaps writeable memory to 0x00000000 */
  66. #endif
  67. /*
  68. * The system comes up with the flash memory non-writable and
  69. * configuration locked. If we want U-Boot to be used for flash
  70. * access we cannot have the flash memory locked.
  71. */
  72. writel(EBI_UNLOCK_MAGIC, EBI_BASE + EBI_LOCK_REG);
  73. val = readl(EBI_BASE + EBI_CSR1_REG);
  74. val &= EBI_CSR_WREN_MASK;
  75. val |= EBI_CSR_WREN_ENABLE;
  76. writel(val, EBI_BASE + EBI_CSR1_REG);
  77. writel(0, EBI_BASE + EBI_LOCK_REG);
  78. icache_enable ();
  79. return 0;
  80. }
  81. int misc_init_r (void)
  82. {
  83. #ifdef CONFIG_PCI
  84. pci_init();
  85. #endif
  86. setenv("verify", "n");
  87. return (0);
  88. }
  89. /*
  90. * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot
  91. * from there, which means we cannot test the RAM underneath the ROM at this
  92. * point. It will be unmapped later on, when we are executing from the
  93. * relocated in RAM U-Boot. We simply assume that this RAM is usable if the
  94. * RAM on higher addresses works fine.
  95. */
  96. #define REMAPPED_FLASH_SZ 0x40000
  97. int dram_init (void)
  98. {
  99. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  100. #ifdef CONFIG_CM_SPD_DETECT
  101. {
  102. extern void dram_query(void);
  103. u32 cm_reg_sdram;
  104. u32 sdram_shift;
  105. dram_query(); /* Assembler accesses to CM registers */
  106. /* Queries the SPD values */
  107. /* Obtain the SDRAM size from the CM SDRAM register */
  108. cm_reg_sdram = readl(CM_BASE + OS_SDRAM);
  109. /* Register SDRAM size
  110. *
  111. * 0xXXXXXXbbb000bb 16 MB
  112. * 0xXXXXXXbbb001bb 32 MB
  113. * 0xXXXXXXbbb010bb 64 MB
  114. * 0xXXXXXXbbb011bb 128 MB
  115. * 0xXXXXXXbbb100bb 256 MB
  116. *
  117. */
  118. sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
  119. gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
  120. REMAPPED_FLASH_SZ,
  121. 0x01000000 << sdram_shift);
  122. }
  123. #else
  124. gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
  125. REMAPPED_FLASH_SZ,
  126. PHYS_SDRAM_1_SIZE);
  127. #endif /* CM_SPD_DETECT */
  128. /* We only have one bank of RAM, set it to whatever was detected */
  129. gd->bd->bi_dram[0].size = gd->ram_size;
  130. return 0;
  131. }
  132. #ifdef CONFIG_CMD_NET
  133. int board_eth_init(bd_t *bis)
  134. {
  135. int rc = 0;
  136. #ifdef CONFIG_SMC91111
  137. rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
  138. #endif
  139. rc += pci_eth_init(bis);
  140. return rc;
  141. }
  142. #endif