top9000.c 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288
  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian@popies.net>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * (C) Copyright 2010
  7. * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <net.h>
  29. #include <netdev.h>
  30. #include <mmc.h>
  31. #include <i2c.h>
  32. #include <spi.h>
  33. #include <asm/io.h>
  34. #include <asm/arch/hardware.h>
  35. #include <asm/arch/at91sam9260_matrix.h>
  36. #include <asm/arch/at91sam9_smc.h>
  37. #include <asm/arch/at91_common.h>
  38. #include <asm/arch/at91_pmc.h>
  39. #include <asm/arch/at91_rstc.h>
  40. #include <asm/arch/at91_shdwn.h>
  41. #include <asm/arch/gpio.h>
  42. DECLARE_GLOBAL_DATA_PTR;
  43. #ifdef CONFIG_CMD_NAND
  44. static void nand_hw_init(void)
  45. {
  46. struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  47. struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  48. unsigned long csa;
  49. /* Assign CS3 to NAND/SmartMedia Interface */
  50. csa = readl(&matrix->ebicsa);
  51. csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  52. writel(csa, &matrix->ebicsa);
  53. /* Configure SMC CS3 for NAND/SmartMedia */
  54. writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  55. AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  56. &smc->cs[3].setup);
  57. writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  58. AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  59. &smc->cs[3].pulse);
  60. writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  61. &smc->cs[3].cycle);
  62. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  63. AT91_SMC_MODE_EXNW_DISABLE |
  64. AT91_SMC_MODE_DBW_8 |
  65. AT91_SMC_MODE_TDF_CYCLE(2),
  66. &smc->cs[3].mode);
  67. /* Configure RDY/BSY */
  68. at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  69. /* Enable NandFlash */
  70. at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  71. }
  72. #endif
  73. #ifdef CONFIG_MACB
  74. static void macb_hw_init(void)
  75. {
  76. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  77. /* Enable EMAC clock */
  78. writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
  79. /* Initialize EMAC=MACB hardware */
  80. at91_macb_hw_init();
  81. }
  82. #endif
  83. #ifdef CONFIG_GENERIC_ATMEL_MCI
  84. /* this is a weak define that we are overriding */
  85. int board_mmc_init(bd_t *bd)
  86. {
  87. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  88. /* Enable MCI clock */
  89. writel(1 << ATMEL_ID_MCI, &pmc->pcer);
  90. /* Initialize MCI hardware */
  91. at91_mci_hw_init();
  92. /* This calls the atmel_mmc_init in gen_atmel_mci.c */
  93. return atmel_mci_init((void *)ATMEL_BASE_MCI);
  94. }
  95. /* this is a weak define that we are overriding */
  96. int board_mmc_getcd(struct mmc *mmc)
  97. {
  98. return !at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN);
  99. }
  100. #endif
  101. int board_early_init_f(void)
  102. {
  103. struct at91_shdwn *shdwn = (struct at91_shdwn *)ATMEL_BASE_SHDWN;
  104. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  105. /*
  106. * make sure the board can be powered on by
  107. * any transition on WKUP
  108. */
  109. writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
  110. &shdwn->mr);
  111. /* Enable clocks for all PIOs */
  112. writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
  113. (1 << ATMEL_ID_PIOC),
  114. &pmc->pcer);
  115. /* set SCL0 and SDA0 to open drain */
  116. at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
  117. at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
  118. at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
  119. at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
  120. at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
  121. at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
  122. /* set SCL1 and SDA1 to open drain */
  123. at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
  124. at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
  125. at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
  126. at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
  127. at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
  128. at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
  129. return 0;
  130. }
  131. int board_init(void)
  132. {
  133. /* arch number of TOP9000 Board */
  134. gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
  135. /* adress of boot parameters */
  136. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  137. at91_seriald_hw_init();
  138. #ifdef CONFIG_CMD_NAND
  139. nand_hw_init();
  140. #endif
  141. #ifdef CONFIG_MACB
  142. macb_hw_init();
  143. #endif
  144. #ifdef CONFIG_ATMEL_SPI0
  145. /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
  146. at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
  147. #endif
  148. #ifdef CONFIG_ATMEL_SPI1
  149. at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
  150. #endif
  151. return 0;
  152. }
  153. #ifdef CONFIG_MISC_INIT_R
  154. int misc_init_r(void)
  155. {
  156. /* read 'factory' part of EEPROM */
  157. read_factory_r();
  158. return 0;
  159. }
  160. #endif
  161. int dram_init(void)
  162. {
  163. gd->ram_size = get_ram_size(
  164. (void *)CONFIG_SYS_SDRAM_BASE,
  165. CONFIG_SYS_SDRAM_SIZE);
  166. return 0;
  167. }
  168. #ifdef CONFIG_RESET_PHY_R
  169. void reset_phy(void)
  170. {
  171. /*
  172. * Initialize ethernet HW addresses prior to starting Linux,
  173. * needed for nfsroot.
  174. * TODO: We need to investigate if that is really necessary.
  175. */
  176. eth_init(gd->bd);
  177. }
  178. #endif
  179. int board_eth_init(bd_t *bis)
  180. {
  181. int rc = 0;
  182. int num = 0;
  183. #ifdef CONFIG_MACB
  184. rc = macb_eth_initialize(0,
  185. (void *)ATMEL_BASE_EMAC0,
  186. CONFIG_SYS_PHY_ID);
  187. if (!rc)
  188. num++;
  189. #endif
  190. #ifdef CONFIG_ENC28J60
  191. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
  192. ENC_SPI_CLOCK, SPI_MODE_0);
  193. if (!rc)
  194. num++;
  195. # ifdef CONFIG_ENC28J60_2
  196. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
  197. ENC_SPI_CLOCK, SPI_MODE_0);
  198. if (!rc)
  199. num++;
  200. # ifdef CONFIG_ENC28J60_3
  201. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
  202. ENC_SPI_CLOCK, SPI_MODE_0);
  203. if (!rc)
  204. num++;
  205. # endif
  206. # endif
  207. #endif
  208. return num;
  209. }
  210. /*
  211. * I2C access functions
  212. *
  213. * Note:
  214. * We need to access Bus 0 before relocation to access the
  215. * environment settings.
  216. * However i2c_get_bus_num() cannot be called before
  217. * relocation.
  218. */
  219. #ifdef CONFIG_SOFT_I2C
  220. void iic_init(void)
  221. {
  222. /* ports are now initialized in board_early_init_f() */
  223. }
  224. int iic_read(void)
  225. {
  226. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  227. case 0:
  228. return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
  229. case 1:
  230. return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
  231. }
  232. return 1;
  233. }
  234. void iic_sda(int bit)
  235. {
  236. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  237. case 0:
  238. at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
  239. break;
  240. case 1:
  241. at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
  242. break;
  243. }
  244. }
  245. void iic_scl(int bit)
  246. {
  247. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  248. case 0:
  249. at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
  250. break;
  251. case 1:
  252. at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
  253. break;
  254. }
  255. }
  256. #endif