da830evm.c 6.0 KB

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  1. /*
  2. * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  3. *
  4. * Base on code from TI. Original Notices follow:
  5. *
  6. * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
  7. *
  8. * Modified for DA8xx EVM.
  9. *
  10. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  11. *
  12. * Parts are shamelessly stolen from various TI sources, original copyright
  13. * follows:
  14. * -----------------------------------------------------------------
  15. *
  16. * Copyright (C) 2004 Texas Instruments.
  17. *
  18. * ----------------------------------------------------------------------------
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  32. * ----------------------------------------------------------------------------
  33. */
  34. #include <common.h>
  35. #include <i2c.h>
  36. #include <net.h>
  37. #include <netdev.h>
  38. #include <asm/arch/hardware.h>
  39. #include <asm/arch/emif_defs.h>
  40. #include <asm/arch/emac_defs.h>
  41. #include <asm/io.h>
  42. #include <asm/arch/davinci_misc.h>
  43. DECLARE_GLOBAL_DATA_PTR;
  44. #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
  45. /* SPI0 pin muxer settings */
  46. static const struct pinmux_config spi0_pins[] = {
  47. { pinmux(7), 1, 3 },
  48. { pinmux(7), 1, 4 },
  49. { pinmux(7), 1, 5 },
  50. { pinmux(7), 1, 6 },
  51. { pinmux(7), 1, 7 }
  52. };
  53. /* EMIF-A bus pins for 8-bit NAND support on CS3 */
  54. static const struct pinmux_config emifa_nand_pins[] = {
  55. { pinmux(13), 1, 6 },
  56. { pinmux(13), 1, 7 },
  57. { pinmux(14), 1, 0 },
  58. { pinmux(14), 1, 1 },
  59. { pinmux(14), 1, 2 },
  60. { pinmux(14), 1, 3 },
  61. { pinmux(14), 1, 4 },
  62. { pinmux(14), 1, 5 },
  63. { pinmux(15), 1, 7 },
  64. { pinmux(16), 1, 0 },
  65. { pinmux(18), 1, 1 },
  66. { pinmux(18), 1, 4 },
  67. { pinmux(18), 1, 5 },
  68. };
  69. /* EMAC PHY interface pins */
  70. static const struct pinmux_config emac_pins[] = {
  71. { pinmux(9), 0, 5 },
  72. { pinmux(10), 2, 1 },
  73. { pinmux(10), 2, 2 },
  74. { pinmux(10), 2, 3 },
  75. { pinmux(10), 2, 4 },
  76. { pinmux(10), 2, 5 },
  77. { pinmux(10), 2, 6 },
  78. { pinmux(10), 2, 7 },
  79. { pinmux(11), 2, 0 },
  80. { pinmux(11), 2, 1 },
  81. };
  82. /* UART pin muxer settings */
  83. static const struct pinmux_config uart_pins[] = {
  84. { pinmux(8), 2, 7 },
  85. { pinmux(9), 2, 0 }
  86. };
  87. /* I2C pin muxer settings */
  88. static const struct pinmux_config i2c_pins[] = {
  89. { pinmux(8), 2, 3 },
  90. { pinmux(8), 2, 4 }
  91. };
  92. /* USB0_DRVVBUS pin muxer settings */
  93. static const struct pinmux_config usb_pins[] = {
  94. { pinmux(9), 1, 1 }
  95. };
  96. static const struct pinmux_resource pinmuxes[] = {
  97. #ifdef CONFIG_SPI_FLASH
  98. PINMUX_ITEM(spi0_pins),
  99. #endif
  100. PINMUX_ITEM(uart_pins),
  101. PINMUX_ITEM(i2c_pins),
  102. #ifdef CONFIG_USB_DA8XX
  103. PINMUX_ITEM(usb_pins),
  104. #endif
  105. #ifdef CONFIG_USE_NAND
  106. PINMUX_ITEM(emifa_nand_pins),
  107. #endif
  108. #if defined(CONFIG_DRIVER_TI_EMAC)
  109. PINMUX_ITEM(emac_pins),
  110. #endif
  111. };
  112. static const struct lpsc_resource lpsc[] = {
  113. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  114. { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
  115. { DAVINCI_LPSC_EMAC }, /* image download */
  116. { DAVINCI_LPSC_UART2 }, /* console */
  117. { DAVINCI_LPSC_GPIO },
  118. };
  119. int board_init(void)
  120. {
  121. #ifndef CONFIG_USE_IRQ
  122. irq_init();
  123. #endif
  124. #ifdef CONFIG_NAND_DAVINCI
  125. /* EMIFA 100MHz clock select */
  126. writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
  127. &davinci_syscfg_regs->cfgchip3);
  128. /* NAND CS setup */
  129. writel((DAVINCI_ABCR_WSETUP(0) |
  130. DAVINCI_ABCR_WSTROBE(2) |
  131. DAVINCI_ABCR_WHOLD(0) |
  132. DAVINCI_ABCR_RSETUP(0) |
  133. DAVINCI_ABCR_RSTROBE(2) |
  134. DAVINCI_ABCR_RHOLD(0) |
  135. DAVINCI_ABCR_TA(2) |
  136. DAVINCI_ABCR_ASIZE_8BIT),
  137. &davinci_emif_regs->ab2cr);
  138. #endif
  139. /* arch number of the board */
  140. gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
  141. /* address of boot parameters */
  142. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  143. /*
  144. * Power on required peripherals
  145. * ARM does not have access by default to PSC0 and PSC1
  146. * assuming here that the DSP bootloader has set the IOPU
  147. * such that PSC access is available to ARM
  148. */
  149. if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
  150. return 1;
  151. /* setup the SUSPSRC for ARM to control emulation suspend */
  152. writel(readl(&davinci_syscfg_regs->suspsrc) &
  153. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  154. DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  155. DAVINCI_SYSCFG_SUSPSRC_UART2),
  156. &davinci_syscfg_regs->suspsrc);
  157. /* configure pinmux settings */
  158. if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
  159. return 1;
  160. /* enable the console UART */
  161. writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
  162. DAVINCI_UART_PWREMU_MGMT_UTRST),
  163. &davinci_uart2_ctrl_regs->pwremu_mgmt);
  164. return(0);
  165. }
  166. #if defined(CONFIG_DRIVER_TI_EMAC)
  167. #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
  168. /*
  169. * Initializes on-board ethernet controllers.
  170. */
  171. int board_eth_init(bd_t *bis)
  172. {
  173. u_int8_t mac_addr[6];
  174. u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
  175. struct eth_device *dev;
  176. /* Read Ethernet MAC address from EEPROM */
  177. if (dvevm_read_mac_address(mac_addr))
  178. /* set address env if not already set */
  179. davinci_sync_env_enetaddr(mac_addr);
  180. /* read the address back from env */
  181. if (!eth_getenv_enetaddr("ethaddr", mac_addr))
  182. return -1;
  183. /* enable the Ethernet switch in the 3 port PHY */
  184. if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
  185. switch_start_cmd, sizeof(switch_start_cmd))) {
  186. printf("Ethernet switch start failed!\n");
  187. return -1;
  188. }
  189. /* finally, initialise the driver */
  190. if (!davinci_emac_initialize()) {
  191. printf("Error: Ethernet init failed!\n");
  192. return -1;
  193. }
  194. dev = eth_get_dev();
  195. /* provide the resulting addr to the driver */
  196. memcpy(dev->enetaddr, mac_addr, 6);
  197. dev->write_hwaddr(dev);
  198. return 0;
  199. }
  200. #endif /* CONFIG_DRIVER_TI_EMAC */