io.h 4.7 KB

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  1. /*
  2. * U-boot - io.h IO routines
  3. *
  4. * Copyright (c) 2005 blackfin.uclinux.org
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #ifndef _BLACKFIN_IO_H
  25. #define _BLACKFIN_IO_H
  26. #ifdef __KERNEL__
  27. #include <linux/config.h>
  28. /* function prototypes for CF support */
  29. extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
  30. extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
  31. extern unsigned char cf_inb(volatile unsigned char *addr);
  32. extern void cf_outb(unsigned char val, volatile unsigned char* addr);
  33. /*
  34. * These are for ISA/PCI shared memory _only_ and should never be used
  35. * on any other type of memory, including Zorro memory. They are meant to
  36. * access the bus in the bus byte order which is little-endian!.
  37. *
  38. * readX/writeX() are used to access memory mapped devices. On some
  39. * architectures the memory mapped IO stuff needs to be accessed
  40. * differently. On the m68k architecture, we just read/write the
  41. * memory location directly.
  42. */
  43. #define readb(addr) ({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
  44. #define readw(addr) ({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
  45. #define readl(addr) ({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
  46. #define writeb(b,addr) {((*(volatile unsigned char *) (addr)) = (b)); asm("ssync;");}
  47. #define writew(b,addr) {((*(volatile unsigned short *) (addr)) = (b)); asm("ssync;");}
  48. #define writel(b,addr) {((*(volatile unsigned int *) (addr)) = (b)); asm("ssync;");}
  49. #define memset_io(a,b,c) memset((void *)(a),(b),(c))
  50. #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
  51. #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
  52. #define inb_p(addr) readb((addr) + BF533_PCIIO_BASE)
  53. #define inb(addr) cf_inb((volatile unsigned char*)(addr))
  54. #define outb(x,addr) cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
  55. #define outb_p(x,addr) outb(x, (addr) + BF533_PCIIO_BASE)
  56. #define inw(addr) readw((addr) + BF533_PCIIO_BASE)
  57. #define inl(addr) readl((addr) + BF533_PCIIO_BASE)
  58. #define outw(x,addr) writew(x, (addr) + BF533_PCIIO_BASE)
  59. #define outl(x,addr) writel(x, (addr) + BF533_PCIIO_BASE)
  60. #define insb(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), count)
  61. #define insw(port, addr, count) cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
  62. #define insl(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), (4*count))
  63. #define outsb(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, count)
  64. #define outsw(port,addr,count) cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
  65. #define outsl(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, (4*count))
  66. #define IO_SPACE_LIMIT 0xffff
  67. /* Values for nocacheflag and cmode */
  68. #define IOMAP_FULL_CACHING 0
  69. #define IOMAP_NOCACHE_SER 1
  70. #define IOMAP_NOCACHE_NONSER 2
  71. #define IOMAP_WRITETHROUGH 3
  72. extern void *__ioremap(unsigned long physaddr, unsigned long size,
  73. int cacheflag);
  74. extern void __iounmap(void *addr, unsigned long size);
  75. extern inline void *ioremap(unsigned long physaddr, unsigned long size)
  76. {
  77. return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
  78. }
  79. extern inline void *ioremap_nocache(unsigned long physaddr,
  80. unsigned long size)
  81. {
  82. return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
  83. }
  84. extern inline void *ioremap_writethrough(unsigned long physaddr,
  85. unsigned long size)
  86. {
  87. return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
  88. }
  89. extern inline void *ioremap_fullcache(unsigned long physaddr,
  90. unsigned long size)
  91. {
  92. return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
  93. }
  94. extern void iounmap(void *addr);
  95. extern void blkfin_inv_cache_all(void);
  96. #define dma_cache_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
  97. #define dma_cache_wback(_start,_size) do { } while (0)
  98. #define dma_cache_wback_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
  99. #endif
  100. #endif