board.c 3.2 KB

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  1. /*
  2. * (C) Copyright 2010,2011
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <ns16550.h>
  25. #include <asm/io.h>
  26. #include <asm/arch/tegra2.h>
  27. #include <asm/arch/sys_proto.h>
  28. #include <asm/arch/clk_rst.h>
  29. #include <asm/arch/clock.h>
  30. #include <asm/arch/pinmux.h>
  31. #include <asm/arch/uart.h>
  32. #include "board.h"
  33. DECLARE_GLOBAL_DATA_PTR;
  34. enum {
  35. /* UARTs which we can enable */
  36. UARTA = 1 << 0,
  37. UARTD = 1 << 3,
  38. };
  39. const struct tegra2_sysinfo sysinfo = {
  40. CONFIG_TEGRA2_BOARD_STRING
  41. };
  42. /*
  43. * Routine: timer_init
  44. * Description: init the timestamp and lastinc value
  45. */
  46. int timer_init(void)
  47. {
  48. return 0;
  49. }
  50. static void enable_uart(enum periph_id pid)
  51. {
  52. /* Assert UART reset and enable clock */
  53. reset_set_enable(pid, 1);
  54. clock_enable(pid);
  55. clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
  56. /* wait for 2us */
  57. udelay(2);
  58. /* De-assert reset to UART */
  59. reset_set_enable(pid, 0);
  60. }
  61. /*
  62. * Routine: clock_init_uart
  63. * Description: init clock for the UART(s)
  64. */
  65. static void clock_init_uart(int uart_ids)
  66. {
  67. if (uart_ids & UARTA)
  68. enable_uart(PERIPH_ID_UART1);
  69. if (uart_ids & UARTD)
  70. enable_uart(PERIPH_ID_UART4);
  71. }
  72. /*
  73. * Routine: pin_mux_uart
  74. * Description: setup the pin muxes/tristate values for the UART(s)
  75. */
  76. static void pin_mux_uart(int uart_ids)
  77. {
  78. if (uart_ids & UARTA) {
  79. pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
  80. pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
  81. pinmux_tristate_disable(PINGRP_IRRX);
  82. pinmux_tristate_disable(PINGRP_IRTX);
  83. }
  84. if (uart_ids & UARTD) {
  85. pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
  86. pinmux_tristate_disable(PINGRP_GMC);
  87. }
  88. }
  89. /*
  90. * Routine: board_init
  91. * Description: Early hardware init.
  92. */
  93. int board_init(void)
  94. {
  95. clock_init();
  96. clock_verify();
  97. /* boot param addr */
  98. gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
  99. return 0;
  100. }
  101. #ifdef CONFIG_BOARD_EARLY_INIT_F
  102. int board_early_init_f(void)
  103. {
  104. int uart_ids = 0; /* bit mask of which UART ids to enable */
  105. #ifdef CONFIG_TEGRA2_ENABLE_UARTA
  106. uart_ids |= UARTA;
  107. #endif
  108. #ifdef CONFIG_TEGRA2_ENABLE_UARTD
  109. uart_ids |= UARTD;
  110. #endif
  111. /* We didn't do this init in start.S, so do it now */
  112. cpu_init_cp15();
  113. /* Initialize essential common plls */
  114. clock_early_init();
  115. /* Initialize UART clocks */
  116. clock_init_uart(uart_ids);
  117. /* Initialize periph pinmuxes */
  118. pin_mux_uart(uart_ids);
  119. /* Initialize periph GPIOs */
  120. gpio_config_uart();
  121. return 0;
  122. }
  123. #endif /* EARLY_INIT */