ea20.c 9.1 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de
  4. *
  5. * Based on da850evm.c, original Copyrights follow:
  6. *
  7. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  8. *
  9. * Based on da830evm.c. Original Copyrights follow:
  10. *
  11. * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  12. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27. */
  28. #include <common.h>
  29. #include <i2c.h>
  30. #include <net.h>
  31. #include <netdev.h>
  32. #include <asm/arch/hardware.h>
  33. #include <asm/arch/emif_defs.h>
  34. #include <asm/arch/emac_defs.h>
  35. #include <asm/io.h>
  36. #include <asm/arch/davinci_misc.h>
  37. #include <asm/arch/gpio.h>
  38. #include <asm/arch/da8xx-fb.h>
  39. DECLARE_GLOBAL_DATA_PTR;
  40. #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
  41. static const struct da8xx_panel lcd_panel = {
  42. /* Casio COM57H531x */
  43. .name = "Casio_COM57H531x",
  44. .width = 640,
  45. .height = 480,
  46. .hfp = 12,
  47. .hbp = 144,
  48. .hsw = 30,
  49. .vfp = 10,
  50. .vbp = 35,
  51. .vsw = 3,
  52. .pxl_clk = 25000000,
  53. .invert_pxl_clk = 0,
  54. };
  55. /* SPI0 pin muxer settings */
  56. static const struct pinmux_config spi1_pins[] = {
  57. { pinmux(5), 1, 1 },
  58. { pinmux(5), 1, 2 },
  59. { pinmux(5), 1, 4 },
  60. { pinmux(5), 1, 5 }
  61. };
  62. /* I2C pin muxer settings */
  63. static const struct pinmux_config i2c_pins[] = {
  64. { pinmux(4), 2, 2 },
  65. { pinmux(4), 2, 3 }
  66. };
  67. /* UART0 pin muxer settings */
  68. static const struct pinmux_config uart_pins[] = {
  69. { pinmux(3), 2, 7 },
  70. { pinmux(3), 2, 6 },
  71. { pinmux(3), 2, 4 },
  72. { pinmux(3), 2, 5 }
  73. };
  74. #ifdef CONFIG_DRIVER_TI_EMAC
  75. #define HAS_RMII 1
  76. static const struct pinmux_config emac_pins[] = {
  77. { pinmux(14), 8, 2 },
  78. { pinmux(14), 8, 3 },
  79. { pinmux(14), 8, 4 },
  80. { pinmux(14), 8, 5 },
  81. { pinmux(14), 8, 6 },
  82. { pinmux(14), 8, 7 },
  83. { pinmux(15), 8, 1 },
  84. { pinmux(4), 8, 0 },
  85. { pinmux(4), 8, 1 }
  86. };
  87. #endif
  88. #ifdef CONFIG_NAND_DAVINCI
  89. const struct pinmux_config nand_pins[] = {
  90. { pinmux(7), 1, 0}, /* CS2 */
  91. { pinmux(7), 0, 1}, /* CS3 in three state*/
  92. { pinmux(7), 1, 4 }, /* EMA_WE */
  93. { pinmux(7), 1, 5 }, /* EMA_OE */
  94. { pinmux(9), 1, 0 }, /* EMA_D[7] */
  95. { pinmux(9), 1, 1 }, /* EMA_D[6] */
  96. { pinmux(9), 1, 2 }, /* EMA_D[5] */
  97. { pinmux(9), 1, 3 }, /* EMA_D[4] */
  98. { pinmux(9), 1, 4 }, /* EMA_D[3] */
  99. { pinmux(9), 1, 5 }, /* EMA_D[2] */
  100. { pinmux(9), 1, 6 }, /* EMA_D[1] */
  101. { pinmux(9), 1, 7 }, /* EMA_D[0] */
  102. { pinmux(12), 1, 5 }, /* EMA_A[2] */
  103. { pinmux(12), 1, 6 }, /* EMA_A[1] */
  104. { pinmux(6), 1, 0 } /* EMA_CLK */
  105. };
  106. #endif
  107. const struct pinmux_config gpio_pins[] = {
  108. { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
  109. { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
  110. { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
  111. { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */
  112. { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/
  113. };
  114. const struct pinmux_config lcd_pins[] = {
  115. { pinmux(17), 2, 1 }, /* LCD_D_0 */
  116. { pinmux(17), 2, 0 }, /* LCD_D_1 */
  117. { pinmux(16), 2, 7 }, /* LCD_D_2 */
  118. { pinmux(16), 2, 6 }, /* LCD_D_3 */
  119. { pinmux(16), 2, 5 }, /* LCD_D_4 */
  120. { pinmux(16), 2, 4 }, /* LCD_D_5 */
  121. { pinmux(16), 2, 3 }, /* LCD_D_6 */
  122. { pinmux(16), 2, 2 }, /* LCD_D_7 */
  123. { pinmux(18), 2, 1 }, /* LCD_D_8 */
  124. { pinmux(18), 2, 0 }, /* LCD_D_9 */
  125. { pinmux(17), 2, 7 }, /* LCD_D_10 */
  126. { pinmux(17), 2, 6 }, /* LCD_D_11 */
  127. { pinmux(17), 2, 5 }, /* LCD_D_12 */
  128. { pinmux(17), 2, 4 }, /* LCD_D_13 */
  129. { pinmux(17), 2, 3 }, /* LCD_D_14 */
  130. { pinmux(17), 2, 2 }, /* LCD_D_15 */
  131. { pinmux(18), 2, 6 }, /* LCD_PCLK */
  132. { pinmux(19), 2, 0 }, /* LCD_HSYNC */
  133. { pinmux(19), 2, 1 }, /* LCD_VSYNC */
  134. { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
  135. };
  136. const struct pinmux_config halten_pin[] = {
  137. { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */
  138. };
  139. static const struct pinmux_resource pinmuxes[] = {
  140. #ifdef CONFIG_SPI_FLASH
  141. PINMUX_ITEM(spi1_pins),
  142. #endif
  143. PINMUX_ITEM(uart_pins),
  144. PINMUX_ITEM(i2c_pins),
  145. #ifdef CONFIG_NAND_DAVINCI
  146. PINMUX_ITEM(nand_pins),
  147. #endif
  148. #ifdef CONFIG_VIDEO
  149. PINMUX_ITEM(lcd_pins),
  150. #endif
  151. };
  152. static const struct lpsc_resource lpsc[] = {
  153. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  154. { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
  155. { DAVINCI_LPSC_EMAC }, /* image download */
  156. { DAVINCI_LPSC_UART0 }, /* console */
  157. { DAVINCI_LPSC_GPIO },
  158. { DAVINCI_LPSC_LCDC }, /* LCD */
  159. };
  160. int board_early_init_f(void)
  161. {
  162. struct davinci_gpio *gpio6_base =
  163. (struct davinci_gpio *)DAVINCI_GPIO_BANK67;
  164. /* PinMux for GPIO */
  165. if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
  166. return 1;
  167. /* Set the RESETOUTn low */
  168. writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
  169. &gpio6_base->set_data);
  170. writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
  171. /* Set U0_SW0 low for UART0 as console*/
  172. writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
  173. &gpio6_base->set_data);
  174. writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
  175. /* Set U0_SW1 low for UART0 as console*/
  176. writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
  177. &gpio6_base->set_data);
  178. writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
  179. /* Set LCD_B_PWR low to power down LCD Backlight*/
  180. writel((readl(&gpio6_base->set_data) & ~(1 << 6)),
  181. &gpio6_base->set_data);
  182. writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir);
  183. /* Set DISP_ON low to disable LCD output*/
  184. writel((readl(&gpio6_base->set_data) & ~(1 << 1)),
  185. &gpio6_base->set_data);
  186. writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir);
  187. #ifndef CONFIG_USE_IRQ
  188. irq_init();
  189. #endif
  190. /*
  191. * NAND CS setup - cycle counts based on da850evm NAND timings in the
  192. * Linux kernel @ 25MHz EMIFA
  193. */
  194. #ifdef CONFIG_NAND_DAVINCI
  195. writel((DAVINCI_ABCR_WSETUP(0) |
  196. DAVINCI_ABCR_WSTROBE(1) |
  197. DAVINCI_ABCR_WHOLD(0) |
  198. DAVINCI_ABCR_RSETUP(0) |
  199. DAVINCI_ABCR_RSTROBE(1) |
  200. DAVINCI_ABCR_RHOLD(0) |
  201. DAVINCI_ABCR_TA(0) |
  202. DAVINCI_ABCR_ASIZE_8BIT),
  203. &davinci_emif_regs->ab1cr); /* CS2 */
  204. #endif
  205. /*
  206. * Power on required peripherals
  207. * ARM does not have access by default to PSC0 and PSC1
  208. * assuming here that the DSP bootloader has set the IOPU
  209. * such that PSC access is available to ARM
  210. */
  211. if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
  212. return 1;
  213. /* setup the SUSPSRC for ARM to control emulation suspend */
  214. writel(readl(&davinci_syscfg_regs->suspsrc) &
  215. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  216. DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  217. DAVINCI_SYSCFG_SUSPSRC_UART0),
  218. &davinci_syscfg_regs->suspsrc);
  219. /* configure pinmux settings */
  220. if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
  221. return 1;
  222. #ifdef CONFIG_DRIVER_TI_EMAC
  223. if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
  224. return 1;
  225. davinci_emac_mii_mode_sel(HAS_RMII);
  226. #endif /* CONFIG_DRIVER_TI_EMAC */
  227. /* enable the console UART */
  228. writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
  229. DAVINCI_UART_PWREMU_MGMT_UTRST),
  230. &davinci_uart0_ctrl_regs->pwremu_mgmt);
  231. /*
  232. * Reconfigure the LCDC priority to the highest to ensure that
  233. * the throughput/latency requirements for the LCDC are met.
  234. */
  235. writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
  236. &davinci_syscfg_regs->mstpri[2]);
  237. /* Set LCD_B_PWR low to power up LCD Backlight*/
  238. writel((readl(&gpio6_base->set_data) | (1 << 6)),
  239. &gpio6_base->set_data);
  240. /* Set DISP_ON low to disable LCD output*/
  241. writel((readl(&gpio6_base->set_data) | (1 << 1)),
  242. &gpio6_base->set_data);
  243. return 0;
  244. }
  245. int board_init(void)
  246. {
  247. /* arch number of the board */
  248. gd->bd->bi_arch_number = MACH_TYPE_EA20;
  249. /* address of boot parameters */
  250. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  251. da8xx_video_init(&lcd_panel, 16);
  252. return 0;
  253. }
  254. #ifdef BOARD_LATE_INIT
  255. int board_late_init(void)
  256. {
  257. struct davinci_gpio *gpio8_base =
  258. (struct davinci_gpio *)DAVINCI_GPIO_BANK8;
  259. /* PinMux for HALTEN */
  260. if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
  261. return 1;
  262. /* Set HALTEN to high */
  263. writel((readl(&gpio8_base->set_data) | (1 << 6)),
  264. &gpio8_base->set_data);
  265. writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir);
  266. setenv("stdout", "serial");
  267. return 0;
  268. }
  269. #endif /* BOARD_LATE_INIT */
  270. #ifdef CONFIG_DRIVER_TI_EMAC
  271. /*
  272. * Initializes on-board ethernet controllers.
  273. */
  274. int board_eth_init(bd_t *bis)
  275. {
  276. if (!davinci_emac_initialize()) {
  277. printf("Error: Ethernet init failed!\n");
  278. return -1;
  279. }
  280. /*
  281. * This board has a RMII PHY. However, the MDC line on the SOM
  282. * must not be disabled (there is no MII PHY on the
  283. * baseboard) via the GPIO2[6], because this pin
  284. * disables at the same time the SPI flash.
  285. */
  286. return 0;
  287. }
  288. #endif /* CONFIG_DRIVER_TI_EMAC */