cmd_ide.c 50 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #ifdef CONFIG_ORION5X
  44. #include <asm/arch/orion5x.h>
  45. #elif defined CONFIG_KIRKWOOD
  46. #include <asm/arch/kirkwood.h>
  47. #endif
  48. #include <ide.h>
  49. #include <ata.h>
  50. #ifdef CONFIG_STATUS_LED
  51. # include <status_led.h>
  52. #endif
  53. #ifdef CONFIG_IDE_8xx_DIRECT
  54. DECLARE_GLOBAL_DATA_PTR;
  55. #endif
  56. #ifdef __PPC__
  57. # define EIEIO __asm__ volatile ("eieio")
  58. # define SYNC __asm__ volatile ("sync")
  59. #else
  60. # define EIEIO /* nothing */
  61. # define SYNC /* nothing */
  62. #endif
  63. #ifdef CONFIG_IDE_8xx_DIRECT
  64. /* Timings for IDE Interface
  65. *
  66. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  67. * 70 165 30 PIO-Mode 0, [ns]
  68. * 4 9 2 [Cycles]
  69. * 50 125 20 PIO-Mode 1, [ns]
  70. * 3 7 2 [Cycles]
  71. * 30 100 15 PIO-Mode 2, [ns]
  72. * 2 6 1 [Cycles]
  73. * 30 80 10 PIO-Mode 3, [ns]
  74. * 2 5 1 [Cycles]
  75. * 25 70 10 PIO-Mode 4, [ns]
  76. * 2 4 1 [Cycles]
  77. */
  78. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  79. {
  80. /* Setup Length Hold */
  81. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  82. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  83. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  84. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  85. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  86. };
  87. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  88. #ifndef CONFIG_SYS_PIO_MODE
  89. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  90. #endif
  91. static int pio_mode = CONFIG_SYS_PIO_MODE;
  92. /* Make clock cycles and always round up */
  93. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  94. #endif /* CONFIG_IDE_8xx_DIRECT */
  95. /* ------------------------------------------------------------------------- */
  96. /* Current I/O Device */
  97. static int curr_device = -1;
  98. /* Current offset for IDE0 / IDE1 bus access */
  99. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  100. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  101. CONFIG_SYS_ATA_IDE0_OFFSET,
  102. #endif
  103. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  104. CONFIG_SYS_ATA_IDE1_OFFSET,
  105. #endif
  106. };
  107. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  108. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  109. /* ------------------------------------------------------------------------- */
  110. #ifdef CONFIG_IDE_LED
  111. # if !defined(CONFIG_BMS2003) && \
  112. !defined(CONFIG_CPC45) && \
  113. !defined(CONFIG_KUP4K) && \
  114. !defined(CONFIG_KUP4X)
  115. static void ide_led (uchar led, uchar status);
  116. #else
  117. extern void ide_led (uchar led, uchar status);
  118. #endif
  119. #else
  120. #define ide_led(a,b) /* dummy */
  121. #endif
  122. #ifdef CONFIG_IDE_RESET
  123. static void ide_reset (void);
  124. #else
  125. #define ide_reset() /* dummy */
  126. #endif
  127. static void ide_ident (block_dev_desc_t *dev_desc);
  128. static uchar ide_wait (int dev, ulong t);
  129. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  130. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  131. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  132. static void input_data(int dev, ulong *sect_buf, int words);
  133. static void output_data(int dev, const ulong *sect_buf, int words);
  134. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  135. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  136. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  137. #endif
  138. #ifdef CONFIG_ATAPI
  139. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  140. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  141. #endif
  142. #ifdef CONFIG_IDE_8xx_DIRECT
  143. static void set_pcmcia_timing (int pmode);
  144. #endif
  145. /* ------------------------------------------------------------------------- */
  146. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  147. {
  148. int rcode = 0;
  149. switch (argc) {
  150. case 0:
  151. case 1:
  152. return cmd_usage(cmdtp);
  153. case 2:
  154. if (strncmp(argv[1],"res",3) == 0) {
  155. puts ("\nReset IDE"
  156. #ifdef CONFIG_IDE_8xx_DIRECT
  157. " on PCMCIA " PCMCIA_SLOT_MSG
  158. #endif
  159. ": ");
  160. ide_init ();
  161. return 0;
  162. } else if (strncmp(argv[1],"inf",3) == 0) {
  163. int i;
  164. putc ('\n');
  165. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  166. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  167. continue; /* list only known devices */
  168. printf ("IDE device %d: ", i);
  169. dev_print(&ide_dev_desc[i]);
  170. }
  171. return 0;
  172. } else if (strncmp(argv[1],"dev",3) == 0) {
  173. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  174. puts ("\nno IDE devices available\n");
  175. return 1;
  176. }
  177. printf ("\nIDE device %d: ", curr_device);
  178. dev_print(&ide_dev_desc[curr_device]);
  179. return 0;
  180. } else if (strncmp(argv[1],"part",4) == 0) {
  181. int dev, ok;
  182. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  183. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  184. ++ok;
  185. if (dev)
  186. putc ('\n');
  187. print_part(&ide_dev_desc[dev]);
  188. }
  189. }
  190. if (!ok) {
  191. puts ("\nno IDE devices available\n");
  192. rcode ++;
  193. }
  194. return rcode;
  195. }
  196. return cmd_usage(cmdtp);
  197. case 3:
  198. if (strncmp(argv[1],"dev",3) == 0) {
  199. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  200. printf ("\nIDE device %d: ", dev);
  201. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  202. puts ("unknown device\n");
  203. return 1;
  204. }
  205. dev_print(&ide_dev_desc[dev]);
  206. /*ide_print (dev);*/
  207. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  208. return 1;
  209. }
  210. curr_device = dev;
  211. puts ("... is now current device\n");
  212. return 0;
  213. } else if (strncmp(argv[1],"part",4) == 0) {
  214. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  215. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  216. print_part(&ide_dev_desc[dev]);
  217. } else {
  218. printf ("\nIDE device %d not available\n", dev);
  219. rcode = 1;
  220. }
  221. return rcode;
  222. #if 0
  223. } else if (strncmp(argv[1],"pio",4) == 0) {
  224. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  225. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  226. puts ("\nSetting ");
  227. pio_mode = mode;
  228. ide_init ();
  229. } else {
  230. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  231. mode, IDE_MAX_PIO_MODE);
  232. }
  233. return;
  234. #endif
  235. }
  236. return cmd_usage(cmdtp);
  237. default:
  238. /* at least 4 args */
  239. if (strcmp(argv[1],"read") == 0) {
  240. ulong addr = simple_strtoul(argv[2], NULL, 16);
  241. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  242. ulong n;
  243. #ifdef CONFIG_SYS_64BIT_LBA
  244. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  245. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  246. curr_device, blk, cnt);
  247. #else
  248. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  249. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  250. curr_device, blk, cnt);
  251. #endif
  252. n = ide_dev_desc[curr_device].block_read (curr_device,
  253. blk, cnt,
  254. (ulong *)addr);
  255. /* flush cache after read */
  256. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  257. printf ("%ld blocks read: %s\n",
  258. n, (n==cnt) ? "OK" : "ERROR");
  259. if (n==cnt) {
  260. return 0;
  261. } else {
  262. return 1;
  263. }
  264. } else if (strcmp(argv[1],"write") == 0) {
  265. ulong addr = simple_strtoul(argv[2], NULL, 16);
  266. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  267. ulong n;
  268. #ifdef CONFIG_SYS_64BIT_LBA
  269. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  270. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  271. curr_device, blk, cnt);
  272. #else
  273. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  274. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  275. curr_device, blk, cnt);
  276. #endif
  277. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  278. printf ("%ld blocks written: %s\n",
  279. n, (n==cnt) ? "OK" : "ERROR");
  280. if (n==cnt)
  281. return 0;
  282. else
  283. return 1;
  284. } else {
  285. return cmd_usage(cmdtp);
  286. }
  287. return rcode;
  288. }
  289. }
  290. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  291. {
  292. char *boot_device = NULL;
  293. char *ep;
  294. int dev, part = 0;
  295. ulong addr, cnt;
  296. disk_partition_t info;
  297. image_header_t *hdr;
  298. #if defined(CONFIG_FIT)
  299. const void *fit_hdr = NULL;
  300. #endif
  301. show_boot_progress (41);
  302. switch (argc) {
  303. case 1:
  304. addr = CONFIG_SYS_LOAD_ADDR;
  305. boot_device = getenv ("bootdevice");
  306. break;
  307. case 2:
  308. addr = simple_strtoul(argv[1], NULL, 16);
  309. boot_device = getenv ("bootdevice");
  310. break;
  311. case 3:
  312. addr = simple_strtoul(argv[1], NULL, 16);
  313. boot_device = argv[2];
  314. break;
  315. default:
  316. show_boot_progress (-42);
  317. return cmd_usage(cmdtp);
  318. }
  319. show_boot_progress (42);
  320. if (!boot_device) {
  321. puts ("\n** No boot device **\n");
  322. show_boot_progress (-43);
  323. return 1;
  324. }
  325. show_boot_progress (43);
  326. dev = simple_strtoul(boot_device, &ep, 16);
  327. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  328. printf ("\n** Device %d not available\n", dev);
  329. show_boot_progress (-44);
  330. return 1;
  331. }
  332. show_boot_progress (44);
  333. if (*ep) {
  334. if (*ep != ':') {
  335. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  336. show_boot_progress (-45);
  337. return 1;
  338. }
  339. part = simple_strtoul(++ep, NULL, 16);
  340. }
  341. show_boot_progress (45);
  342. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  343. show_boot_progress (-46);
  344. return 1;
  345. }
  346. show_boot_progress (46);
  347. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  348. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  349. printf ("\n** Invalid partition type \"%.32s\""
  350. " (expect \"" BOOT_PART_TYPE "\")\n",
  351. info.type);
  352. show_boot_progress (-47);
  353. return 1;
  354. }
  355. show_boot_progress (47);
  356. printf ("\nLoading from IDE device %d, partition %d: "
  357. "Name: %.32s Type: %.32s\n",
  358. dev, part, info.name, info.type);
  359. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  360. info.start, info.size, info.blksz);
  361. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  362. printf ("** Read error on %d:%d\n", dev, part);
  363. show_boot_progress (-48);
  364. return 1;
  365. }
  366. show_boot_progress (48);
  367. switch (genimg_get_format ((void *)addr)) {
  368. case IMAGE_FORMAT_LEGACY:
  369. hdr = (image_header_t *)addr;
  370. show_boot_progress (49);
  371. if (!image_check_hcrc (hdr)) {
  372. puts ("\n** Bad Header Checksum **\n");
  373. show_boot_progress (-50);
  374. return 1;
  375. }
  376. show_boot_progress (50);
  377. image_print_contents (hdr);
  378. cnt = image_get_image_size (hdr);
  379. break;
  380. #if defined(CONFIG_FIT)
  381. case IMAGE_FORMAT_FIT:
  382. fit_hdr = (const void *)addr;
  383. puts ("Fit image detected...\n");
  384. cnt = fit_get_size (fit_hdr);
  385. break;
  386. #endif
  387. default:
  388. show_boot_progress (-49);
  389. puts ("** Unknown image type\n");
  390. return 1;
  391. }
  392. cnt += info.blksz - 1;
  393. cnt /= info.blksz;
  394. cnt -= 1;
  395. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  396. (ulong *)(addr+info.blksz)) != cnt) {
  397. printf ("** Read error on %d:%d\n", dev, part);
  398. show_boot_progress (-51);
  399. return 1;
  400. }
  401. show_boot_progress (51);
  402. #if defined(CONFIG_FIT)
  403. /* This cannot be done earlier, we need complete FIT image in RAM first */
  404. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  405. if (!fit_check_format (fit_hdr)) {
  406. show_boot_progress (-140);
  407. puts ("** Bad FIT image format\n");
  408. return 1;
  409. }
  410. show_boot_progress (141);
  411. fit_print_contents (fit_hdr);
  412. }
  413. #endif
  414. /* Loading ok, update default load address */
  415. load_addr = addr;
  416. return bootm_maybe_autostart(cmdtp, argv[0]);
  417. }
  418. /* ------------------------------------------------------------------------- */
  419. void inline
  420. __ide_outb(int dev, int port, unsigned char val)
  421. {
  422. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  423. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  424. #if defined(CONFIG_IDE_AHB)
  425. if (port) {
  426. /* write command */
  427. ide_write_register(dev, port, val);
  428. } else {
  429. /* write data */
  430. outb(val, (ATA_CURR_BASE(dev)));
  431. }
  432. #else
  433. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  434. #endif
  435. }
  436. void ide_outb (int dev, int port, unsigned char val)
  437. __attribute__((weak, alias("__ide_outb")));
  438. unsigned char inline
  439. __ide_inb(int dev, int port)
  440. {
  441. uchar val;
  442. #if defined(CONFIG_IDE_AHB)
  443. val = ide_read_register(dev, port);
  444. #else
  445. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  446. #endif
  447. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  448. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  449. return val;
  450. }
  451. unsigned char ide_inb(int dev, int port)
  452. __attribute__((weak, alias("__ide_inb")));
  453. #ifdef CONFIG_TUNE_PIO
  454. int inline
  455. __ide_set_piomode(int pio_mode)
  456. {
  457. return 0;
  458. }
  459. int inline ide_set_piomode(int pio_mode)
  460. __attribute__((weak, alias("__ide_set_piomode")));
  461. #endif
  462. void ide_init (void)
  463. {
  464. #ifdef CONFIG_IDE_8xx_DIRECT
  465. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  466. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  467. #endif
  468. unsigned char c;
  469. int i, bus;
  470. #if defined(CONFIG_SC3)
  471. unsigned int ata_reset_time = ATA_RESET_TIME;
  472. #endif
  473. #ifdef CONFIG_IDE_8xx_PCCARD
  474. extern int pcmcia_on (void);
  475. extern int ide_devices_found; /* Initialized in check_ide_device() */
  476. #endif /* CONFIG_IDE_8xx_PCCARD */
  477. #ifdef CONFIG_IDE_PREINIT
  478. extern int ide_preinit (void);
  479. WATCHDOG_RESET();
  480. if (ide_preinit ()) {
  481. puts ("ide_preinit failed\n");
  482. return;
  483. }
  484. #endif /* CONFIG_IDE_PREINIT */
  485. #ifdef CONFIG_IDE_8xx_PCCARD
  486. extern int pcmcia_on (void);
  487. extern int ide_devices_found; /* Initialized in check_ide_device() */
  488. WATCHDOG_RESET();
  489. ide_devices_found = 0;
  490. /* initialize the PCMCIA IDE adapter card */
  491. pcmcia_on();
  492. if (!ide_devices_found)
  493. return;
  494. udelay (1000000); /* 1 s */
  495. #endif /* CONFIG_IDE_8xx_PCCARD */
  496. WATCHDOG_RESET();
  497. #ifdef CONFIG_IDE_8xx_DIRECT
  498. /* Initialize PIO timing tables */
  499. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  500. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  501. gd->bus_clk);
  502. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  503. gd->bus_clk);
  504. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  505. gd->bus_clk);
  506. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  507. " len=%3d ns/%d clk"
  508. " hold=%2d ns/%d clk\n",
  509. i,
  510. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  511. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  512. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  513. }
  514. #endif /* CONFIG_IDE_8xx_DIRECT */
  515. /* Reset the IDE just to be sure.
  516. * Light LED's to show
  517. */
  518. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  519. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  520. #ifdef CONFIG_IDE_8xx_DIRECT
  521. /* PCMCIA / IDE initialization for common mem space */
  522. pcmp->pcmc_pgcrb = 0;
  523. /* start in PIO mode 0 - most relaxed timings */
  524. pio_mode = 0;
  525. set_pcmcia_timing (pio_mode);
  526. #endif /* CONFIG_IDE_8xx_DIRECT */
  527. /*
  528. * Wait for IDE to get ready.
  529. * According to spec, this can take up to 31 seconds!
  530. */
  531. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  532. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  533. #ifdef CONFIG_IDE_8xx_PCCARD
  534. /* Skip non-ide devices from probing */
  535. if ((ide_devices_found & (1 << bus)) == 0) {
  536. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  537. continue;
  538. }
  539. #endif
  540. printf ("Bus %d: ", bus);
  541. ide_bus_ok[bus] = 0;
  542. /* Select device
  543. */
  544. udelay (100000); /* 100 ms */
  545. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  546. udelay (100000); /* 100 ms */
  547. i = 0;
  548. do {
  549. udelay (10000); /* 10 ms */
  550. c = ide_inb (dev, ATA_STATUS);
  551. i++;
  552. #if defined(CONFIG_SC3)
  553. if (i > (ata_reset_time * 100)) {
  554. #else
  555. if (i > (ATA_RESET_TIME * 100)) {
  556. #endif
  557. puts ("** Timeout **\n");
  558. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  559. return;
  560. }
  561. if ((i >= 100) && ((i%100)==0)) {
  562. putc ('.');
  563. }
  564. } while (c & ATA_STAT_BUSY);
  565. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  566. puts ("not available ");
  567. debug ("Status = 0x%02X ", c);
  568. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  569. } else if ((c & ATA_STAT_READY) == 0) {
  570. puts ("not available ");
  571. debug ("Status = 0x%02X ", c);
  572. #endif
  573. } else {
  574. puts ("OK ");
  575. ide_bus_ok[bus] = 1;
  576. }
  577. WATCHDOG_RESET();
  578. }
  579. putc ('\n');
  580. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  581. curr_device = -1;
  582. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  583. #ifdef CONFIG_IDE_LED
  584. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  585. #endif
  586. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  587. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  588. ide_dev_desc[i].dev=i;
  589. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  590. ide_dev_desc[i].blksz=0;
  591. ide_dev_desc[i].lba=0;
  592. ide_dev_desc[i].block_read=ide_read;
  593. ide_dev_desc[i].block_write = ide_write;
  594. if (!ide_bus_ok[IDE_BUS(i)])
  595. continue;
  596. ide_led (led, 1); /* LED on */
  597. ide_ident(&ide_dev_desc[i]);
  598. ide_led (led, 0); /* LED off */
  599. dev_print(&ide_dev_desc[i]);
  600. /* ide_print (i); */
  601. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  602. init_part (&ide_dev_desc[i]); /* initialize partition type */
  603. if (curr_device < 0)
  604. curr_device = i;
  605. }
  606. }
  607. WATCHDOG_RESET();
  608. }
  609. /* ------------------------------------------------------------------------- */
  610. block_dev_desc_t * ide_get_dev(int dev)
  611. {
  612. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  613. }
  614. #ifdef CONFIG_IDE_8xx_DIRECT
  615. static void
  616. set_pcmcia_timing (int pmode)
  617. {
  618. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  619. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  620. ulong timings;
  621. debug ("Set timing for PIO Mode %d\n", pmode);
  622. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  623. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  624. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  625. ;
  626. /* IDE 0
  627. */
  628. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  629. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  630. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  631. | timings
  632. #endif
  633. ;
  634. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  635. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  636. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  637. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  638. | timings
  639. #endif
  640. ;
  641. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  642. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  643. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  644. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  645. | timings
  646. #endif
  647. ;
  648. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  649. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  650. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  651. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  652. | timings
  653. #endif
  654. ;
  655. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  656. /* IDE 1
  657. */
  658. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  659. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  660. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  661. | timings
  662. #endif
  663. ;
  664. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  665. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  666. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  667. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  668. | timings
  669. #endif
  670. ;
  671. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  672. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  673. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  674. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  675. | timings
  676. #endif
  677. ;
  678. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  679. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  680. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  681. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  682. | timings
  683. #endif
  684. ;
  685. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  686. }
  687. #endif /* CONFIG_IDE_8xx_DIRECT */
  688. /* ------------------------------------------------------------------------- */
  689. /* We only need to swap data if we are running on a big endian cpu. */
  690. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  691. #if defined(__LITTLE_ENDIAN) || \
  692. (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2))
  693. #define input_swap_data(x,y,z) input_data(x,y,z)
  694. #else
  695. static void
  696. input_swap_data(int dev, ulong *sect_buf, int words)
  697. {
  698. #if defined(CONFIG_CPC45)
  699. uchar i;
  700. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  701. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  702. ushort *dbuf = (ushort *)sect_buf;
  703. while (words--) {
  704. for (i=0; i<2; i++) {
  705. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  706. *(uchar *)dbuf = *pbuf_odd;
  707. dbuf+=1;
  708. }
  709. }
  710. #else
  711. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  712. ushort *dbuf = (ushort *)sect_buf;
  713. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  714. while (words--) {
  715. #ifdef __MIPS__
  716. *dbuf++ = swab16p((u16*)pbuf);
  717. *dbuf++ = swab16p((u16*)pbuf);
  718. #elif defined(CONFIG_PCS440EP)
  719. *dbuf++ = *pbuf;
  720. *dbuf++ = *pbuf;
  721. #else
  722. *dbuf++ = ld_le16(pbuf);
  723. *dbuf++ = ld_le16(pbuf);
  724. #endif /* !MIPS */
  725. }
  726. #endif
  727. }
  728. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  729. #if defined(CONFIG_IDE_SWAP_IO)
  730. static void
  731. output_data(int dev, const ulong *sect_buf, int words)
  732. {
  733. #if defined(CONFIG_CPC45)
  734. uchar *dbuf;
  735. volatile uchar *pbuf_even;
  736. volatile uchar *pbuf_odd;
  737. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  738. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  739. dbuf = (uchar *)sect_buf;
  740. while (words--) {
  741. EIEIO;
  742. *pbuf_even = *dbuf++;
  743. EIEIO;
  744. *pbuf_odd = *dbuf++;
  745. EIEIO;
  746. *pbuf_even = *dbuf++;
  747. EIEIO;
  748. *pbuf_odd = *dbuf++;
  749. }
  750. #else
  751. ushort *dbuf;
  752. volatile ushort *pbuf;
  753. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  754. dbuf = (ushort *)sect_buf;
  755. while (words--) {
  756. #if defined(CONFIG_PCS440EP)
  757. /* not tested, because CF was write protected */
  758. EIEIO;
  759. *pbuf = ld_le16(dbuf++);
  760. EIEIO;
  761. *pbuf = ld_le16(dbuf++);
  762. #else
  763. EIEIO;
  764. *pbuf = *dbuf++;
  765. EIEIO;
  766. *pbuf = *dbuf++;
  767. #endif
  768. }
  769. #endif
  770. }
  771. #else /* ! CONFIG_IDE_SWAP_IO */
  772. static void
  773. output_data(int dev, const ulong *sect_buf, int words)
  774. {
  775. #if defined(CONFIG_IDE_AHB)
  776. ide_write_data(dev, sect_buf, words);
  777. #else
  778. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  779. #endif
  780. }
  781. #endif /* CONFIG_IDE_SWAP_IO */
  782. #if defined(CONFIG_IDE_SWAP_IO)
  783. static void
  784. input_data(int dev, ulong *sect_buf, int words)
  785. {
  786. #if defined(CONFIG_CPC45)
  787. uchar *dbuf;
  788. volatile uchar *pbuf_even;
  789. volatile uchar *pbuf_odd;
  790. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  791. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  792. dbuf = (uchar *)sect_buf;
  793. while (words--) {
  794. *dbuf++ = *pbuf_even;
  795. EIEIO;
  796. SYNC;
  797. *dbuf++ = *pbuf_odd;
  798. EIEIO;
  799. SYNC;
  800. *dbuf++ = *pbuf_even;
  801. EIEIO;
  802. SYNC;
  803. *dbuf++ = *pbuf_odd;
  804. EIEIO;
  805. SYNC;
  806. }
  807. #else
  808. ushort *dbuf;
  809. volatile ushort *pbuf;
  810. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  811. dbuf = (ushort *)sect_buf;
  812. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  813. while (words--) {
  814. #if defined(CONFIG_PCS440EP)
  815. EIEIO;
  816. *dbuf++ = ld_le16(pbuf);
  817. EIEIO;
  818. *dbuf++ = ld_le16(pbuf);
  819. #else
  820. EIEIO;
  821. *dbuf++ = *pbuf;
  822. EIEIO;
  823. *dbuf++ = *pbuf;
  824. #endif
  825. }
  826. #endif
  827. }
  828. #else /* ! CONFIG_IDE_SWAP_IO */
  829. static void
  830. input_data(int dev, ulong *sect_buf, int words)
  831. {
  832. #if defined(CONFIG_IDE_AHB)
  833. ide_read_data(dev, sect_buf, words);
  834. #else
  835. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  836. #endif
  837. }
  838. #endif /* CONFIG_IDE_SWAP_IO */
  839. /* -------------------------------------------------------------------------
  840. */
  841. static void ide_ident (block_dev_desc_t *dev_desc)
  842. {
  843. ulong iobuf[ATA_SECTORWORDS];
  844. unsigned char c;
  845. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  846. #ifdef CONFIG_ATAPI
  847. int retries = 0;
  848. int do_retry = 0;
  849. #endif
  850. #ifdef CONFIG_TUNE_PIO
  851. int pio_mode;
  852. #endif
  853. #if 0
  854. int mode, cycle_time;
  855. #endif
  856. int device;
  857. device=dev_desc->dev;
  858. printf (" Device %d: ", device);
  859. ide_led (DEVICE_LED(device), 1); /* LED on */
  860. /* Select device
  861. */
  862. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  863. dev_desc->if_type=IF_TYPE_IDE;
  864. #ifdef CONFIG_ATAPI
  865. do_retry = 0;
  866. retries = 0;
  867. /* Warning: This will be tricky to read */
  868. while (retries <= 1) {
  869. /* check signature */
  870. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  871. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  872. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  873. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  874. /* ATAPI Signature found */
  875. dev_desc->if_type=IF_TYPE_ATAPI;
  876. /* Start Ident Command
  877. */
  878. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  879. /*
  880. * Wait for completion - ATAPI devices need more time
  881. * to become ready
  882. */
  883. c = ide_wait (device, ATAPI_TIME_OUT);
  884. } else
  885. #endif
  886. {
  887. /* Start Ident Command
  888. */
  889. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  890. /* Wait for completion
  891. */
  892. c = ide_wait (device, IDE_TIME_OUT);
  893. }
  894. ide_led (DEVICE_LED(device), 0); /* LED off */
  895. if (((c & ATA_STAT_DRQ) == 0) ||
  896. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  897. #ifdef CONFIG_ATAPI
  898. {
  899. /* Need to soft reset the device in case it's an ATAPI... */
  900. debug ("Retrying...\n");
  901. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  902. udelay(100000);
  903. ide_outb (device, ATA_COMMAND, 0x08);
  904. udelay (500000); /* 500 ms */
  905. }
  906. /* Select device
  907. */
  908. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  909. retries++;
  910. #else
  911. return;
  912. #endif
  913. }
  914. #ifdef CONFIG_ATAPI
  915. else
  916. break;
  917. } /* see above - ugly to read */
  918. if (retries == 2) /* Not found */
  919. return;
  920. #endif
  921. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  922. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  923. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  924. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  925. #ifdef __LITTLE_ENDIAN
  926. /*
  927. * firmware revision, model, and serial number have Big Endian Byte
  928. * order in Word. Convert all three to little endian.
  929. *
  930. * See CF+ and CompactFlash Specification Revision 2.0:
  931. * 6.2.1.6: Identify Drive, Table 39 for more details
  932. */
  933. strswab (dev_desc->revision);
  934. strswab (dev_desc->vendor);
  935. strswab (dev_desc->product);
  936. #endif /* __LITTLE_ENDIAN */
  937. if ((iop->config & 0x0080)==0x0080)
  938. dev_desc->removable = 1;
  939. else
  940. dev_desc->removable = 0;
  941. #ifdef CONFIG_TUNE_PIO
  942. /* Mode 0 - 2 only, are directly determined by word 51. */
  943. pio_mode = iop->tPIO;
  944. if (pio_mode > 2) {
  945. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  946. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  947. }
  948. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  949. * shall set bit 1 of word 53 to one and support the fields contained
  950. * in words 64 through 70.
  951. */
  952. if (iop->field_valid & 0x02) {
  953. /* Mode 3 and above are possible. Check in order from slow
  954. * to fast, so we wind up with the highest mode allowed.
  955. */
  956. if (iop->eide_pio_modes & 0x01)
  957. pio_mode = 3;
  958. if (iop->eide_pio_modes & 0x02)
  959. pio_mode = 4;
  960. if (ata_id_is_cfa((u16 *)iop)) {
  961. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  962. pio_mode = 5;
  963. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  964. pio_mode = 6;
  965. }
  966. }
  967. /* System-specific, depends on bus speeds, etc. */
  968. ide_set_piomode(pio_mode);
  969. #endif /* CONFIG_TUNE_PIO */
  970. #if 0
  971. /*
  972. * Drive PIO mode autoselection
  973. */
  974. mode = iop->tPIO;
  975. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  976. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  977. mode = 2;
  978. debug ("Override tPIO -> 2\n");
  979. }
  980. if (iop->field_valid & 2) { /* drive implements ATA2? */
  981. debug ("Drive implements ATA2\n");
  982. if (iop->capability & 8) { /* drive supports use_iordy? */
  983. cycle_time = iop->eide_pio_iordy;
  984. } else {
  985. cycle_time = iop->eide_pio;
  986. }
  987. debug ("cycle time = %d\n", cycle_time);
  988. mode = 4;
  989. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  990. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  991. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  992. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  993. }
  994. printf ("PIO mode to use: PIO %d\n", mode);
  995. #endif /* 0 */
  996. #ifdef CONFIG_ATAPI
  997. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  998. atapi_inquiry(dev_desc);
  999. return;
  1000. }
  1001. #endif /* CONFIG_ATAPI */
  1002. #ifdef __BIG_ENDIAN
  1003. /* swap shorts */
  1004. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  1005. #else /* ! __BIG_ENDIAN */
  1006. /*
  1007. * do not swap shorts on little endian
  1008. *
  1009. * See CF+ and CompactFlash Specification Revision 2.0:
  1010. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1011. */
  1012. dev_desc->lba = iop->lba_capacity;
  1013. #endif /* __BIG_ENDIAN */
  1014. #ifdef CONFIG_LBA48
  1015. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1016. dev_desc->lba48 = 1;
  1017. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1018. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1019. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1020. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1021. } else {
  1022. dev_desc->lba48 = 0;
  1023. }
  1024. #endif /* CONFIG_LBA48 */
  1025. /* assuming HD */
  1026. dev_desc->type=DEV_TYPE_HARDDISK;
  1027. dev_desc->blksz=ATA_BLOCKSIZE;
  1028. dev_desc->lun=0; /* just to fill something in... */
  1029. #if 0 /* only used to test the powersaving mode,
  1030. * if enabled, the drive goes after 5 sec
  1031. * in standby mode */
  1032. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1033. c = ide_wait (device, IDE_TIME_OUT);
  1034. ide_outb (device, ATA_SECT_CNT, 1);
  1035. ide_outb (device, ATA_LBA_LOW, 0);
  1036. ide_outb (device, ATA_LBA_MID, 0);
  1037. ide_outb (device, ATA_LBA_HIGH, 0);
  1038. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1039. ide_outb (device, ATA_COMMAND, 0xe3);
  1040. udelay (50);
  1041. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1042. #endif
  1043. }
  1044. /* ------------------------------------------------------------------------- */
  1045. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1046. {
  1047. ulong n = 0;
  1048. unsigned char c;
  1049. unsigned char pwrsave=0; /* power save */
  1050. #ifdef CONFIG_LBA48
  1051. unsigned char lba48 = 0;
  1052. if (blknr & 0x0000fffff0000000ULL) {
  1053. /* more than 28 bits used, use 48bit mode */
  1054. lba48 = 1;
  1055. }
  1056. #endif
  1057. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1058. device, blknr, blkcnt, (ulong)buffer);
  1059. ide_led (DEVICE_LED(device), 1); /* LED on */
  1060. /* Select device
  1061. */
  1062. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1063. c = ide_wait (device, IDE_TIME_OUT);
  1064. if (c & ATA_STAT_BUSY) {
  1065. printf ("IDE read: device %d not ready\n", device);
  1066. goto IDE_READ_E;
  1067. }
  1068. /* first check if the drive is in Powersaving mode, if yes,
  1069. * increase the timeout value */
  1070. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1071. udelay (50);
  1072. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1073. if (c & ATA_STAT_BUSY) {
  1074. printf ("IDE read: device %d not ready\n", device);
  1075. goto IDE_READ_E;
  1076. }
  1077. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1078. printf ("No Powersaving mode %X\n", c);
  1079. } else {
  1080. c = ide_inb(device,ATA_SECT_CNT);
  1081. debug ("Powersaving %02X\n",c);
  1082. if(c==0)
  1083. pwrsave=1;
  1084. }
  1085. while (blkcnt-- > 0) {
  1086. c = ide_wait (device, IDE_TIME_OUT);
  1087. if (c & ATA_STAT_BUSY) {
  1088. printf ("IDE read: device %d not ready\n", device);
  1089. break;
  1090. }
  1091. #ifdef CONFIG_LBA48
  1092. if (lba48) {
  1093. /* write high bits */
  1094. ide_outb (device, ATA_SECT_CNT, 0);
  1095. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1096. #ifdef CONFIG_SYS_64BIT_LBA
  1097. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1098. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1099. #else
  1100. ide_outb (device, ATA_LBA_MID, 0);
  1101. ide_outb (device, ATA_LBA_HIGH, 0);
  1102. #endif
  1103. }
  1104. #endif
  1105. ide_outb (device, ATA_SECT_CNT, 1);
  1106. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1107. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1108. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1109. #ifdef CONFIG_LBA48
  1110. if (lba48) {
  1111. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1112. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1113. } else
  1114. #endif
  1115. {
  1116. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1117. ATA_DEVICE(device) |
  1118. ((blknr >> 24) & 0xF) );
  1119. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1120. }
  1121. udelay (50);
  1122. if(pwrsave) {
  1123. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1124. pwrsave=0;
  1125. } else {
  1126. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1127. }
  1128. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1129. #if defined(CONFIG_SYS_64BIT_LBA)
  1130. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1131. device, blknr, c);
  1132. #else
  1133. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1134. device, (ulong)blknr, c);
  1135. #endif
  1136. break;
  1137. }
  1138. input_data (device, buffer, ATA_SECTORWORDS);
  1139. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1140. ++n;
  1141. ++blknr;
  1142. buffer += ATA_BLOCKSIZE;
  1143. }
  1144. IDE_READ_E:
  1145. ide_led (DEVICE_LED(device), 0); /* LED off */
  1146. return (n);
  1147. }
  1148. /* ------------------------------------------------------------------------- */
  1149. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
  1150. {
  1151. ulong n = 0;
  1152. unsigned char c;
  1153. #ifdef CONFIG_LBA48
  1154. unsigned char lba48 = 0;
  1155. if (blknr & 0x0000fffff0000000ULL) {
  1156. /* more than 28 bits used, use 48bit mode */
  1157. lba48 = 1;
  1158. }
  1159. #endif
  1160. ide_led (DEVICE_LED(device), 1); /* LED on */
  1161. /* Select device
  1162. */
  1163. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1164. while (blkcnt-- > 0) {
  1165. c = ide_wait (device, IDE_TIME_OUT);
  1166. if (c & ATA_STAT_BUSY) {
  1167. printf ("IDE read: device %d not ready\n", device);
  1168. goto WR_OUT;
  1169. }
  1170. #ifdef CONFIG_LBA48
  1171. if (lba48) {
  1172. /* write high bits */
  1173. ide_outb (device, ATA_SECT_CNT, 0);
  1174. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1175. #ifdef CONFIG_SYS_64BIT_LBA
  1176. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1177. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1178. #else
  1179. ide_outb (device, ATA_LBA_MID, 0);
  1180. ide_outb (device, ATA_LBA_HIGH, 0);
  1181. #endif
  1182. }
  1183. #endif
  1184. ide_outb (device, ATA_SECT_CNT, 1);
  1185. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1186. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1187. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1188. #ifdef CONFIG_LBA48
  1189. if (lba48) {
  1190. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1191. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1192. } else
  1193. #endif
  1194. {
  1195. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1196. ATA_DEVICE(device) |
  1197. ((blknr >> 24) & 0xF) );
  1198. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1199. }
  1200. udelay (50);
  1201. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1202. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1203. #if defined(CONFIG_SYS_64BIT_LBA)
  1204. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1205. device, blknr, c);
  1206. #else
  1207. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1208. device, (ulong)blknr, c);
  1209. #endif
  1210. goto WR_OUT;
  1211. }
  1212. output_data (device, buffer, ATA_SECTORWORDS);
  1213. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1214. ++n;
  1215. ++blknr;
  1216. buffer += ATA_BLOCKSIZE;
  1217. }
  1218. WR_OUT:
  1219. ide_led (DEVICE_LED(device), 0); /* LED off */
  1220. return (n);
  1221. }
  1222. /* ------------------------------------------------------------------------- */
  1223. /*
  1224. * copy src to dest, skipping leading and trailing blanks and null
  1225. * terminate the string
  1226. * "len" is the size of available memory including the terminating '\0'
  1227. */
  1228. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1229. {
  1230. unsigned char *end, *last;
  1231. last = dst;
  1232. end = src + len - 1;
  1233. /* reserve space for '\0' */
  1234. if (len < 2)
  1235. goto OUT;
  1236. /* skip leading white space */
  1237. while ((*src) && (src<end) && (*src==' '))
  1238. ++src;
  1239. /* copy string, omitting trailing white space */
  1240. while ((*src) && (src<end)) {
  1241. *dst++ = *src;
  1242. if (*src++ != ' ')
  1243. last = dst;
  1244. }
  1245. OUT:
  1246. *last = '\0';
  1247. }
  1248. /* ------------------------------------------------------------------------- */
  1249. /*
  1250. * Wait until Busy bit is off, or timeout (in ms)
  1251. * Return last status
  1252. */
  1253. static uchar ide_wait (int dev, ulong t)
  1254. {
  1255. ulong delay = 10 * t; /* poll every 100 us */
  1256. uchar c;
  1257. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1258. udelay (100);
  1259. if (delay-- == 0) {
  1260. break;
  1261. }
  1262. }
  1263. return (c);
  1264. }
  1265. /* ------------------------------------------------------------------------- */
  1266. #ifdef CONFIG_IDE_RESET
  1267. extern void ide_set_reset(int idereset);
  1268. static void ide_reset (void)
  1269. {
  1270. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1271. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1272. #endif
  1273. int i;
  1274. curr_device = -1;
  1275. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1276. ide_bus_ok[i] = 0;
  1277. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1278. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1279. ide_set_reset (1); /* assert reset */
  1280. /* the reset signal shall be asserted for et least 25 us */
  1281. udelay(25);
  1282. WATCHDOG_RESET();
  1283. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1284. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1285. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1286. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1287. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1288. /* wait 500 ms for the voltage to stabilize
  1289. */
  1290. for (i=0; i<500; ++i) {
  1291. udelay (1000);
  1292. }
  1293. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1294. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1295. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1296. /* configure IDE Motor voltage monitor pin as input */
  1297. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1298. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1299. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1300. /* wait up to 1 s for the motor voltage to stabilize
  1301. */
  1302. for (i=0; i<1000; ++i) {
  1303. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1304. break;
  1305. }
  1306. udelay (1000);
  1307. }
  1308. if (i == 1000) { /* Timeout */
  1309. printf ("\nWarning: 5V for IDE Motor missing\n");
  1310. # ifdef CONFIG_STATUS_LED
  1311. # ifdef STATUS_LED_YELLOW
  1312. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1313. # endif
  1314. # ifdef STATUS_LED_GREEN
  1315. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1316. # endif
  1317. # endif /* CONFIG_STATUS_LED */
  1318. }
  1319. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1320. WATCHDOG_RESET();
  1321. /* de-assert RESET signal */
  1322. ide_set_reset(0);
  1323. /* wait 250 ms */
  1324. for (i=0; i<250; ++i) {
  1325. udelay (1000);
  1326. }
  1327. }
  1328. #endif /* CONFIG_IDE_RESET */
  1329. /* ------------------------------------------------------------------------- */
  1330. #if defined(CONFIG_IDE_LED) && \
  1331. !defined(CONFIG_CPC45) && \
  1332. !defined(CONFIG_KUP4K) && \
  1333. !defined(CONFIG_KUP4X)
  1334. static uchar led_buffer = 0; /* Buffer for current LED status */
  1335. static void ide_led (uchar led, uchar status)
  1336. {
  1337. uchar *led_port = LED_PORT;
  1338. if (status) { /* switch LED on */
  1339. led_buffer |= led;
  1340. } else { /* switch LED off */
  1341. led_buffer &= ~led;
  1342. }
  1343. *led_port = led_buffer;
  1344. }
  1345. #endif /* CONFIG_IDE_LED */
  1346. #if defined(CONFIG_OF_IDE_FIXUP)
  1347. int ide_device_present(int dev)
  1348. {
  1349. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1350. return 0;
  1351. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1352. }
  1353. #endif
  1354. /* ------------------------------------------------------------------------- */
  1355. #ifdef CONFIG_ATAPI
  1356. /****************************************************************************
  1357. * ATAPI Support
  1358. */
  1359. #if defined(CONFIG_IDE_SWAP_IO)
  1360. /* since ATAPI may use commands with not 4 bytes alligned length
  1361. * we have our own transfer functions, 2 bytes alligned */
  1362. static void
  1363. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1364. {
  1365. #if defined(CONFIG_CPC45)
  1366. uchar *dbuf;
  1367. volatile uchar *pbuf_even;
  1368. volatile uchar *pbuf_odd;
  1369. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1370. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1371. while (shorts--) {
  1372. EIEIO;
  1373. *pbuf_even = *dbuf++;
  1374. EIEIO;
  1375. *pbuf_odd = *dbuf++;
  1376. }
  1377. #else
  1378. ushort *dbuf;
  1379. volatile ushort *pbuf;
  1380. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1381. dbuf = (ushort *)sect_buf;
  1382. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1383. while (shorts--) {
  1384. EIEIO;
  1385. *pbuf = *dbuf++;
  1386. }
  1387. #endif
  1388. }
  1389. static void
  1390. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1391. {
  1392. #if defined(CONFIG_CPC45)
  1393. uchar *dbuf;
  1394. volatile uchar *pbuf_even;
  1395. volatile uchar *pbuf_odd;
  1396. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1397. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1398. while (shorts--) {
  1399. EIEIO;
  1400. *dbuf++ = *pbuf_even;
  1401. EIEIO;
  1402. *dbuf++ = *pbuf_odd;
  1403. }
  1404. #else
  1405. ushort *dbuf;
  1406. volatile ushort *pbuf;
  1407. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1408. dbuf = (ushort *)sect_buf;
  1409. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1410. while (shorts--) {
  1411. EIEIO;
  1412. *dbuf++ = *pbuf;
  1413. }
  1414. #endif
  1415. }
  1416. #else /* ! CONFIG_IDE_SWAP_IO */
  1417. static void
  1418. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1419. {
  1420. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1421. }
  1422. static void
  1423. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1424. {
  1425. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1426. }
  1427. #endif /* CONFIG_IDE_SWAP_IO */
  1428. /*
  1429. * Wait until (Status & mask) == res, or timeout (in ms)
  1430. * Return last status
  1431. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1432. * and then they set their DRQ Bit
  1433. */
  1434. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1435. {
  1436. ulong delay = 10 * t; /* poll every 100 us */
  1437. uchar c;
  1438. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1439. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1440. /* break if error occurs (doesn't make sense to wait more) */
  1441. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1442. break;
  1443. udelay (100);
  1444. if (delay-- == 0) {
  1445. break;
  1446. }
  1447. }
  1448. return (c);
  1449. }
  1450. /*
  1451. * issue an atapi command
  1452. */
  1453. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1454. {
  1455. unsigned char c,err,mask,res;
  1456. int n;
  1457. ide_led (DEVICE_LED(device), 1); /* LED on */
  1458. /* Select device
  1459. */
  1460. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1461. res = 0;
  1462. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1463. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1464. if ((c & mask) != res) {
  1465. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1466. err=0xFF;
  1467. goto AI_OUT;
  1468. }
  1469. /* write taskfile */
  1470. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1471. ide_outb (device, ATA_SECT_CNT, 0);
  1472. ide_outb (device, ATA_SECT_NUM, 0);
  1473. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1474. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1475. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1476. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1477. udelay (50);
  1478. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1479. res = ATA_STAT_DRQ;
  1480. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1481. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1482. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1483. err=0xFF;
  1484. goto AI_OUT;
  1485. }
  1486. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1487. /* ATAPI Command written wait for completition */
  1488. udelay (5000); /* device must set bsy */
  1489. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1490. /* if no data wait for DRQ = 0 BSY = 0
  1491. * if data wait for DRQ = 1 BSY = 0 */
  1492. res=0;
  1493. if(buflen)
  1494. res = ATA_STAT_DRQ;
  1495. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1496. if ((c & mask) != res ) {
  1497. if (c & ATA_STAT_ERR) {
  1498. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1499. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1500. } else {
  1501. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1502. err=0xFF;
  1503. }
  1504. goto AI_OUT;
  1505. }
  1506. n=ide_inb(device, ATA_CYL_HIGH);
  1507. n<<=8;
  1508. n+=ide_inb(device, ATA_CYL_LOW);
  1509. if(n>buflen) {
  1510. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1511. err=0xff;
  1512. goto AI_OUT;
  1513. }
  1514. if((n==0)&&(buflen<0)) {
  1515. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1516. err=0xff;
  1517. goto AI_OUT;
  1518. }
  1519. if(n!=buflen) {
  1520. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1521. }
  1522. if(n!=0) { /* data transfer */
  1523. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1524. /* we transfer shorts */
  1525. n>>=1;
  1526. /* ok now decide if it is an in or output */
  1527. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1528. debug ("Write to device\n");
  1529. output_data_shorts(device,(unsigned short *)buffer,n);
  1530. } else {
  1531. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1532. input_data_shorts(device,(unsigned short *)buffer,n);
  1533. }
  1534. }
  1535. udelay(5000); /* seems that some CD ROMs need this... */
  1536. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1537. res=0;
  1538. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1539. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1540. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1541. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1542. } else {
  1543. err = 0;
  1544. }
  1545. AI_OUT:
  1546. ide_led (DEVICE_LED(device), 0); /* LED off */
  1547. return (err);
  1548. }
  1549. /*
  1550. * sending the command to atapi_issue. If an status other than good
  1551. * returns, an request_sense will be issued
  1552. */
  1553. #define ATAPI_DRIVE_NOT_READY 100
  1554. #define ATAPI_UNIT_ATTN 10
  1555. unsigned char atapi_issue_autoreq (int device,
  1556. unsigned char* ccb,
  1557. int ccblen,
  1558. unsigned char *buffer,
  1559. int buflen)
  1560. {
  1561. unsigned char sense_data[18],sense_ccb[12];
  1562. unsigned char res,key,asc,ascq;
  1563. int notready,unitattn;
  1564. unitattn=ATAPI_UNIT_ATTN;
  1565. notready=ATAPI_DRIVE_NOT_READY;
  1566. retry:
  1567. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1568. if (res==0)
  1569. return (0); /* Ok */
  1570. if (res==0xFF)
  1571. return (0xFF); /* error */
  1572. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1573. memset(sense_ccb,0,sizeof(sense_ccb));
  1574. memset(sense_data,0,sizeof(sense_data));
  1575. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1576. sense_ccb[4]=18; /* allocation Length */
  1577. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1578. key=(sense_data[2]&0xF);
  1579. asc=(sense_data[12]);
  1580. ascq=(sense_data[13]);
  1581. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1582. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1583. sense_data[0],
  1584. key,
  1585. asc,
  1586. ascq);
  1587. if((key==0))
  1588. return 0; /* ok device ready */
  1589. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1590. if(unitattn-->0) {
  1591. udelay(200*1000);
  1592. goto retry;
  1593. }
  1594. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1595. goto error;
  1596. }
  1597. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1598. if (notready-->0) {
  1599. udelay(200*1000);
  1600. goto retry;
  1601. }
  1602. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1603. goto error;
  1604. }
  1605. if(asc==0x3a) {
  1606. debug ("Media not present\n");
  1607. goto error;
  1608. }
  1609. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1610. error:
  1611. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1612. return (0xFF);
  1613. }
  1614. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1615. {
  1616. unsigned char ccb[12]; /* Command descriptor block */
  1617. unsigned char iobuf[64]; /* temp buf */
  1618. unsigned char c;
  1619. int device;
  1620. device=dev_desc->dev;
  1621. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1622. dev_desc->block_read=atapi_read;
  1623. memset(ccb,0,sizeof(ccb));
  1624. memset(iobuf,0,sizeof(iobuf));
  1625. ccb[0]=ATAPI_CMD_INQUIRY;
  1626. ccb[4]=40; /* allocation Legnth */
  1627. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1628. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1629. if (c!=0)
  1630. return;
  1631. /* copy device ident strings */
  1632. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1633. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1634. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1635. dev_desc->lun=0;
  1636. dev_desc->lba=0;
  1637. dev_desc->blksz=0;
  1638. dev_desc->type=iobuf[0] & 0x1f;
  1639. if ((iobuf[1]&0x80)==0x80)
  1640. dev_desc->removable = 1;
  1641. else
  1642. dev_desc->removable = 0;
  1643. memset(ccb,0,sizeof(ccb));
  1644. memset(iobuf,0,sizeof(iobuf));
  1645. ccb[0]=ATAPI_CMD_START_STOP;
  1646. ccb[4]=0x03; /* start */
  1647. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1648. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1649. if (c!=0)
  1650. return;
  1651. memset(ccb,0,sizeof(ccb));
  1652. memset(iobuf,0,sizeof(iobuf));
  1653. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1654. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1655. if (c!=0)
  1656. return;
  1657. memset(ccb,0,sizeof(ccb));
  1658. memset(iobuf,0,sizeof(iobuf));
  1659. ccb[0]=ATAPI_CMD_READ_CAP;
  1660. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1661. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1662. if (c!=0)
  1663. return;
  1664. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1665. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1666. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1667. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1668. ((unsigned long)iobuf[1]<<16) +
  1669. ((unsigned long)iobuf[2]<< 8) +
  1670. ((unsigned long)iobuf[3]);
  1671. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1672. ((unsigned long)iobuf[5]<<16) +
  1673. ((unsigned long)iobuf[6]<< 8) +
  1674. ((unsigned long)iobuf[7]);
  1675. #ifdef CONFIG_LBA48
  1676. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1677. #endif
  1678. return;
  1679. }
  1680. /*
  1681. * atapi_read:
  1682. * we transfer only one block per command, since the multiple DRQ per
  1683. * command is not yet implemented
  1684. */
  1685. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1686. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1687. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1688. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1689. {
  1690. ulong n = 0;
  1691. unsigned char ccb[12]; /* Command descriptor block */
  1692. ulong cnt;
  1693. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1694. device, blknr, blkcnt, (ulong)buffer);
  1695. do {
  1696. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1697. cnt=ATAPI_READ_MAX_BLOCK;
  1698. } else {
  1699. cnt=blkcnt;
  1700. }
  1701. ccb[0]=ATAPI_CMD_READ_12;
  1702. ccb[1]=0; /* reserved */
  1703. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1704. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1705. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1706. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1707. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1708. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1709. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1710. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1711. ccb[10]=0; /* reserved */
  1712. ccb[11]=0; /* reserved */
  1713. if (atapi_issue_autoreq(device,ccb,12,
  1714. (unsigned char *)buffer,
  1715. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1716. return (n);
  1717. }
  1718. n+=cnt;
  1719. blkcnt-=cnt;
  1720. blknr+=cnt;
  1721. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1722. } while (blkcnt > 0);
  1723. return (n);
  1724. }
  1725. /* ------------------------------------------------------------------------- */
  1726. #endif /* CONFIG_ATAPI */
  1727. U_BOOT_CMD(
  1728. ide, 5, 1, do_ide,
  1729. "IDE sub-system",
  1730. "reset - reset IDE controller\n"
  1731. "ide info - show available IDE devices\n"
  1732. "ide device [dev] - show or set current device\n"
  1733. "ide part [dev] - print partition table of one or all IDE devices\n"
  1734. "ide read addr blk# cnt\n"
  1735. "ide write addr blk# cnt - read/write `cnt'"
  1736. " blocks starting at block `blk#'\n"
  1737. " to/from memory address `addr'"
  1738. );
  1739. U_BOOT_CMD(
  1740. diskboot, 3, 1, do_diskboot,
  1741. "boot from IDE device",
  1742. "loadAddr dev:part"
  1743. );