cpu.c 2.8 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. /*
  28. * CPU specific code
  29. */
  30. #include <common.h>
  31. #include <command.h>
  32. #include <arm946es.h>
  33. #include <asm/system.h>
  34. #ifdef CONFIG_USE_IRQ
  35. DECLARE_GLOBAL_DATA_PTR;
  36. #endif
  37. static void cp_delay (void)
  38. {
  39. volatile int i;
  40. /* copro seems to need some delay between reading and writing */
  41. for (i = 0; i < 100; i++);
  42. }
  43. int cpu_init (void)
  44. {
  45. /*
  46. * setup up stacks if necessary
  47. */
  48. #ifdef CONFIG_USE_IRQ
  49. IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
  50. FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
  51. #endif
  52. return 0;
  53. }
  54. int cleanup_before_linux (void)
  55. {
  56. /*
  57. * this function is called just before we call linux
  58. * it prepares the processor for linux
  59. *
  60. * we turn off caches etc ...
  61. */
  62. unsigned long i;
  63. disable_interrupts ();
  64. /* ARM926E-S needs the protection unit enabled for the icache to have
  65. * been enabled - left for possible later use
  66. * should turn off the protection unit as well....
  67. */
  68. /* turn off I/D-cache */
  69. asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
  70. i &= ~(CR_C | CR_I);
  71. asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
  72. /* flush I/D-cache */
  73. i = 0;
  74. asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
  75. asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i));
  76. return (0);
  77. }
  78. int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  79. {
  80. extern void reset_cpu (ulong addr);
  81. disable_interrupts ();
  82. reset_cpu (0);
  83. /*NOTREACHED*/
  84. return (0);
  85. }
  86. /* ARM926E-S needs the protection unit enabled for this to have any effect
  87. - left for possible later use */
  88. void icache_enable (void)
  89. {
  90. ulong reg;
  91. reg = get_cr (); /* get control reg. */
  92. cp_delay ();
  93. set_cr (reg | CR_I);
  94. }
  95. void icache_disable (void)
  96. {
  97. ulong reg;
  98. reg = get_cr ();
  99. cp_delay ();
  100. set_cr (reg & ~CR_I);
  101. }
  102. int icache_status (void)
  103. {
  104. return (get_cr () & CR_I) != 0;
  105. }