aria.c 4.0 KB

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  1. /*
  2. * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
  3. * (C) Copyright 2009 Dave Srl www.dave.eu
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. #include <common.h>
  25. #include <asm/bitops.h>
  26. #include <command.h>
  27. #include <asm/io.h>
  28. #include <asm/processor.h>
  29. #include <asm/mpc512x.h>
  30. #include <fdt_support.h>
  31. #ifdef CONFIG_MISC_INIT_R
  32. #include <i2c.h>
  33. #endif
  34. DECLARE_GLOBAL_DATA_PTR;
  35. /* Clocks in use */
  36. #define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
  37. CLOCK_SCCR1_LPC_EN | \
  38. CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
  39. CLOCK_SCCR1_PSCFIFO_EN | \
  40. CLOCK_SCCR1_DDR_EN | \
  41. CLOCK_SCCR1_FEC_EN | \
  42. CLOCK_SCCR1_NFC_EN | \
  43. CLOCK_SCCR1_PATA_EN | \
  44. CLOCK_SCCR1_PCI_EN | \
  45. CLOCK_SCCR1_TPR_EN)
  46. #define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
  47. CLOCK_SCCR2_SPDIF_EN | \
  48. CLOCK_SCCR2_DIU_EN | \
  49. CLOCK_SCCR2_I2C_EN)
  50. int board_early_init_f(void)
  51. {
  52. volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
  53. /*
  54. * Enable clocks
  55. */
  56. out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
  57. out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
  58. #if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
  59. setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
  60. #endif
  61. return 0;
  62. }
  63. phys_size_t initdram (int board_type)
  64. {
  65. return fixed_sdram(NULL, NULL, 0);
  66. }
  67. int misc_init_r(void)
  68. {
  69. u32 tmp;
  70. /* we use I2C-2 for on-board eeprom */
  71. i2c_set_bus_num(2);
  72. tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
  73. printf("FPGA: %u-%u.%u.%u\n",
  74. (tmp & 0xFF000000) >> 24,
  75. (tmp & 0x00FF0000) >> 16,
  76. (tmp & 0x0000FF00) >> 8,
  77. tmp & 0x000000FF
  78. );
  79. return 0;
  80. }
  81. static iopin_t ioregs_init[] = {
  82. /*
  83. * FEC
  84. */
  85. /* FEC on PSCx_x*/
  86. {
  87. offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0,
  88. IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  89. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  90. },
  91. {
  92. offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0,
  93. IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  94. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  95. },
  96. {
  97. offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
  98. IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  99. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  100. },
  101. /*
  102. * DIU
  103. */
  104. /* FUNC2=DIU CLK */
  105. {
  106. offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0,
  107. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  108. IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
  109. },
  110. /* FUNC2=DIU_HSYNC */
  111. {
  112. offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0,
  113. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  114. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  115. },
  116. /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
  117. {
  118. offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0,
  119. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  120. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  121. },
  122. /*
  123. * On board SRAM
  124. */
  125. /* FUNC2=/LPC CS6 */
  126. {
  127. offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0,
  128. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  129. IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
  130. },
  131. };
  132. int checkboard (void)
  133. {
  134. puts("Board: ARIA\n");
  135. /* initialize function mux & slew rate IO inter alia on IO Pins */
  136. iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
  137. return 0;
  138. }
  139. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  140. void ft_board_setup(void *blob, bd_t *bd)
  141. {
  142. ft_cpu_setup(blob, bd);
  143. }
  144. #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */