flash.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525
  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2003
  6. * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  28. #if defined (CONFIG_TOP860)
  29. typedef unsigned short FLASH_PORT_WIDTH;
  30. typedef volatile unsigned short FLASH_PORT_WIDTHV;
  31. #define FLASH_ID_MASK 0xFF
  32. #define FPW FLASH_PORT_WIDTH
  33. #define FPWV FLASH_PORT_WIDTHV
  34. #define FLASH_CYCLE1 0x0555
  35. #define FLASH_CYCLE2 0x02aa
  36. #define FLASH_ID1 0
  37. #define FLASH_ID2 1
  38. #endif
  39. #if defined (CONFIG_TOP5200)
  40. typedef unsigned char FLASH_PORT_WIDTH;
  41. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  42. #define FLASH_ID_MASK 0xFF
  43. #define FPW FLASH_PORT_WIDTH
  44. #define FPWV FLASH_PORT_WIDTHV
  45. #define FLASH_CYCLE1 0x0aaa
  46. #define FLASH_CYCLE2 0x0555
  47. #define FLASH_ID1 0
  48. #define FLASH_ID2 2
  49. #endif
  50. /*-----------------------------------------------------------------------
  51. * Functions
  52. */
  53. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  54. static void flash_reset(flash_info_t *info);
  55. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  56. static flash_info_t *flash_get_info(ulong base);
  57. /*-----------------------------------------------------------------------
  58. * flash_init()
  59. *
  60. * sets up flash_info and returns size of FLASH (bytes)
  61. */
  62. unsigned long flash_init (void)
  63. {
  64. unsigned long size = 0;
  65. int i = 0;
  66. extern void flash_preinit(void);
  67. extern void flash_afterinit(uint, ulong, ulong);
  68. ulong flashbase = CFG_FLASH_BASE;
  69. flash_preinit();
  70. /* There is only ONE FLASH device */
  71. memset(&flash_info[i], 0, sizeof(flash_info_t));
  72. flash_info[i].size =
  73. flash_get_size((FPW *)flashbase, &flash_info[i]);
  74. size += flash_info[i].size;
  75. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  76. /* monitor protection ON by default */
  77. flash_protect(FLAG_PROTECT_SET,
  78. CFG_MONITOR_BASE,
  79. CFG_MONITOR_BASE+monitor_flash_len-1,
  80. flash_get_info(CFG_MONITOR_BASE));
  81. #endif
  82. #ifdef CFG_ENV_IS_IN_FLASH
  83. /* ENV protection ON by default */
  84. flash_protect(FLAG_PROTECT_SET,
  85. CFG_ENV_ADDR,
  86. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  87. flash_get_info(CFG_ENV_ADDR));
  88. #endif
  89. flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
  90. return size ? size : 1;
  91. }
  92. /*-----------------------------------------------------------------------
  93. */
  94. static void flash_reset(flash_info_t *info)
  95. {
  96. FPWV *base = (FPWV *)(info->start[0]);
  97. /* Put FLASH back in read mode */
  98. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  99. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  100. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  101. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  102. }
  103. /*-----------------------------------------------------------------------
  104. */
  105. static flash_info_t *flash_get_info(ulong base)
  106. {
  107. int i;
  108. flash_info_t * info;
  109. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  110. info = & flash_info[i];
  111. if (info->size &&
  112. info->start[0] <= base && base <= info->start[0] + info->size - 1)
  113. break;
  114. }
  115. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  116. }
  117. /*-----------------------------------------------------------------------
  118. */
  119. void flash_print_info (flash_info_t *info)
  120. {
  121. int i;
  122. uchar *boottype;
  123. uchar *bootletter;
  124. uchar *fmt;
  125. uchar botbootletter[] = "B";
  126. uchar topbootletter[] = "T";
  127. uchar botboottype[] = "bottom boot sector";
  128. uchar topboottype[] = "top boot sector";
  129. if (info->flash_id == FLASH_UNKNOWN) {
  130. printf ("missing or unknown FLASH type\n");
  131. return;
  132. }
  133. switch (info->flash_id & FLASH_VENDMASK) {
  134. case FLASH_MAN_AMD: printf ("AMD "); break;
  135. #if 0
  136. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  137. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  138. case FLASH_MAN_SST: printf ("SST "); break;
  139. case FLASH_MAN_STM: printf ("STM "); break;
  140. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  141. #endif
  142. default: printf ("Unknown Vendor "); break;
  143. }
  144. /* check for top or bottom boot, if it applies */
  145. if (info->flash_id & FLASH_BTYPE) {
  146. boottype = botboottype;
  147. bootletter = botbootletter;
  148. }
  149. else {
  150. boottype = topboottype;
  151. bootletter = topbootletter;
  152. }
  153. switch (info->flash_id & FLASH_TYPEMASK) {
  154. case FLASH_AM160T:
  155. case FLASH_AM160B:
  156. fmt = "29LV160%s (16 Mbit, %s)\n";
  157. break;
  158. default:
  159. fmt = "Unknown Chip Type\n";
  160. break;
  161. }
  162. printf (fmt, bootletter, boottype);
  163. printf (" Size: %ld MB in %d Sectors\n",
  164. info->size >> 20,
  165. info->sector_count);
  166. printf (" Sector Start Addresses:");
  167. for (i=0; i<info->sector_count; ++i) {
  168. ulong size;
  169. int erased;
  170. ulong *flash = (unsigned long *) info->start[i];
  171. if ((i % 5) == 0) {
  172. printf ("\n ");
  173. }
  174. /*
  175. * Check if whole sector is erased
  176. */
  177. size =
  178. (i != (info->sector_count - 1)) ?
  179. (info->start[i + 1] - info->start[i]) >> 2 :
  180. (info->start[0] + info->size - info->start[i]) >> 2;
  181. for (
  182. flash = (unsigned long *) info->start[i], erased = 1;
  183. (flash != (unsigned long *) info->start[i] + size) && erased;
  184. flash++
  185. )
  186. erased = *flash == ~0x0UL;
  187. printf (" %08lX %s %s",
  188. info->start[i],
  189. erased ? "E": " ",
  190. info->protect[i] ? "(RO)" : " ");
  191. }
  192. printf ("\n");
  193. }
  194. /*-----------------------------------------------------------------------
  195. */
  196. /*
  197. * The following code cannot be run from FLASH!
  198. */
  199. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  200. {
  201. int i;
  202. ulong offset;
  203. /* Write auto select command: read Manufacturer ID */
  204. /* Write auto select command sequence and test FLASH answer */
  205. addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  206. addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  207. addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
  208. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  209. * This works for any bus width and any FLASH device width.
  210. */
  211. udelay(100);
  212. switch (addr[FLASH_ID1] & 0xff) {
  213. case (uchar)AMD_MANUFACT:
  214. info->flash_id = FLASH_MAN_AMD;
  215. break;
  216. #if 0
  217. case (uchar)INTEL_MANUFACT:
  218. info->flash_id = FLASH_MAN_INTEL;
  219. break;
  220. #endif
  221. default:
  222. printf ("unknown vendor=%x ", addr[FLASH_ID1] & 0xff);
  223. info->flash_id = FLASH_UNKNOWN;
  224. info->sector_count = 0;
  225. info->size = 0;
  226. break;
  227. }
  228. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  229. if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[FLASH_ID2]) {
  230. case (FPW)AMD_ID_LV160B:
  231. info->flash_id += FLASH_AM160B;
  232. info->sector_count = 35;
  233. info->size = 0x00200000;
  234. #ifdef CFG_LOWBOOT
  235. offset = 0;
  236. #else
  237. offset = 0x00e00000;
  238. #endif
  239. info->start[0] = (ulong)addr + offset;
  240. info->start[1] = (ulong)addr + offset + 0x4000;
  241. info->start[2] = (ulong)addr + offset + 0x6000;
  242. info->start[3] = (ulong)addr + offset + 0x8000;
  243. for (i = 4; i < info->sector_count; i++)
  244. {
  245. info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
  246. }
  247. break;
  248. default:
  249. printf ("unknown AMD device=%x ", (FPW)addr[FLASH_ID2]);
  250. info->flash_id = FLASH_UNKNOWN;
  251. info->sector_count = 0;
  252. info->size = 0;
  253. return (0); /* => no or unknown flash */
  254. }
  255. /* Put FLASH back in read mode */
  256. flash_reset(info);
  257. return (info->size);
  258. }
  259. /*-----------------------------------------------------------------------
  260. */
  261. int flash_erase (flash_info_t *info, int s_first, int s_last)
  262. {
  263. FPWV *addr;
  264. int flag, prot, sect;
  265. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  266. ulong start, now, last;
  267. int rcode = 0;
  268. if ((s_first < 0) || (s_first > s_last)) {
  269. if (info->flash_id == FLASH_UNKNOWN) {
  270. printf ("- missing\n");
  271. } else {
  272. printf ("- no sectors to erase\n");
  273. }
  274. return 1;
  275. }
  276. switch (info->flash_id & FLASH_TYPEMASK) {
  277. case FLASH_AM160B:
  278. break;
  279. case FLASH_UNKNOWN:
  280. default:
  281. printf ("Can't erase unknown flash type %08lx - aborted\n",
  282. info->flash_id);
  283. return 1;
  284. }
  285. prot = 0;
  286. for (sect=s_first; sect<=s_last; ++sect) {
  287. if (info->protect[sect]) {
  288. prot++;
  289. }
  290. }
  291. if (prot) {
  292. printf ("- Warning: %d protected sectors will not be erased!\n",
  293. prot);
  294. } else {
  295. printf ("\n");
  296. }
  297. last = get_timer(0);
  298. /* Start erase on unprotected sectors */
  299. for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
  300. if (info->protect[sect] != 0) /* protected, skip it */
  301. continue;
  302. /* Disable interrupts which might cause a timeout here */
  303. flag = disable_interrupts();
  304. addr = (FPWV *)(info->start[sect]);
  305. if (intel) {
  306. *addr = (FPW)0x00500050; /* clear status register */
  307. *addr = (FPW)0x00200020; /* erase setup */
  308. *addr = (FPW)0x00D000D0; /* erase confirm */
  309. }
  310. else {
  311. /* must be AMD style if not Intel */
  312. FPWV *base; /* first address in bank */
  313. base = (FPWV *)(info->start[0]);
  314. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  315. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  316. base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
  317. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  318. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  319. *addr = (FPW)0x00300030; /* erase sector */
  320. }
  321. /* re-enable interrupts if necessary */
  322. if (flag)
  323. enable_interrupts();
  324. start = get_timer(0);
  325. /* wait at least 50us for AMD, 80us for Intel.
  326. * Let's wait 1 ms.
  327. */
  328. udelay (1000);
  329. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  330. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  331. printf ("Timeout\n");
  332. if (intel) {
  333. /* suspend erase */
  334. *addr = (FPW)0x00B000B0;
  335. }
  336. flash_reset(info); /* reset to read mode */
  337. rcode = 1; /* failed */
  338. break;
  339. }
  340. /* show that we're waiting */
  341. if ((get_timer(last)) > CFG_HZ) {/* every second */
  342. putc ('.');
  343. last = get_timer(0);
  344. }
  345. }
  346. /* show that we're waiting */
  347. if ((get_timer(last)) > CFG_HZ) { /* every second */
  348. putc ('.');
  349. last = get_timer(0);
  350. }
  351. flash_reset(info); /* reset to read mode */
  352. }
  353. printf (" done\n");
  354. return rcode;
  355. }
  356. /*-----------------------------------------------------------------------
  357. * Copy memory to flash, returns:
  358. * 0 - OK
  359. * 1 - write timeout
  360. * 2 - Flash not erased
  361. */
  362. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  363. {
  364. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  365. int bytes; /* number of bytes to program in current word */
  366. int left; /* number of bytes left to program */
  367. int i, res;
  368. for (left = cnt, res = 0;
  369. left > 0 && res == 0;
  370. addr += sizeof(data), left -= sizeof(data) - bytes) {
  371. bytes = addr & (sizeof(data) - 1);
  372. addr &= ~(sizeof(data) - 1);
  373. /* combine source and destination data so can program
  374. * an entire word of 16 or 32 bits
  375. */
  376. for (i = 0; i < sizeof(data); i++) {
  377. data <<= 8;
  378. if (i < bytes || i - bytes >= left )
  379. data += *((uchar *)addr + i);
  380. else
  381. data += *src++;
  382. }
  383. /* write one word to the flash */
  384. switch (info->flash_id & FLASH_VENDMASK) {
  385. case FLASH_MAN_AMD:
  386. res = write_word_amd(info, (FPWV *)addr, data);
  387. break;
  388. default:
  389. /* unknown flash type, error! */
  390. printf ("missing or unknown FLASH type\n");
  391. res = 1; /* not really a timeout, but gives error */
  392. break;
  393. }
  394. }
  395. return (res);
  396. }
  397. /*-----------------------------------------------------------------------
  398. * Write a word to Flash for AMD FLASH
  399. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  400. * (not an individual chip) is.
  401. *
  402. * returns:
  403. * 0 - OK
  404. * 1 - write timeout
  405. * 2 - Flash not erased
  406. */
  407. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  408. {
  409. ulong start;
  410. int flag;
  411. int res = 0; /* result, assume success */
  412. FPWV *base; /* first address in flash bank */
  413. /* Check if Flash is (sufficiently) erased */
  414. if ((*dest & data) != data) {
  415. return (2);
  416. }
  417. base = (FPWV *)(info->start[0]);
  418. /* Disable interrupts which might cause a timeout here */
  419. flag = disable_interrupts();
  420. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  421. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  422. base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
  423. *dest = data; /* start programming the data */
  424. /* re-enable interrupts if necessary */
  425. if (flag)
  426. enable_interrupts();
  427. start = get_timer (0);
  428. /* data polling for D7 */
  429. while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  430. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  431. *dest = (FPW)0x00F000F0; /* reset bank */
  432. res = 1;
  433. }
  434. }
  435. return (res);
  436. }