pdnb3.c 5.6 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <malloc.h>
  26. #include <asm/arch/ixp425.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. /* Prototypes */
  29. int gunzip(void *, int, unsigned char *, unsigned long *);
  30. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  31. /* predefine these here for FPGA programming (before including fpga.c) */
  32. #define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data)
  33. #define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_DONE)
  34. #define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_INIT)
  35. #define OLD_VAL old_val
  36. static unsigned long old_val = 0;
  37. /*
  38. * include common fpga code (for prodrive boards)
  39. */
  40. #include "../common/fpga.c"
  41. /*
  42. * Miscelaneous platform dependent initialisations
  43. */
  44. int board_init(void)
  45. {
  46. /* arch number of PDNB3 */
  47. gd->bd->bi_arch_number = MACH_TYPE_PDNB3;
  48. /* adress of boot parameters */
  49. gd->bd->bi_boot_params = 0x00000100;
  50. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
  51. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_FPGA_RESET);
  52. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SYS_RUNNING);
  53. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SYS_RUNNING);
  54. /*
  55. * Setup GPIO's for FPGA programming
  56. */
  57. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
  58. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
  59. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
  60. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PRG);
  61. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK);
  62. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DATA);
  63. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_INIT);
  64. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DONE);
  65. /*
  66. * Setup GPIO's for interrupts
  67. */
  68. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
  69. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
  70. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
  71. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
  72. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTORE_INT);
  73. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTORE_INT);
  74. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTART_INT);
  75. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTART_INT);
  76. /*
  77. * Setup GPIO's for 33MHz clock output
  78. */
  79. *IXP425_GPIO_GPCLKR = 0x01FF0000;
  80. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK_33M);
  81. /*
  82. * Setup other chip select's
  83. */
  84. *IXP425_EXP_CS1 = CONFIG_SYS_EXP_CS1;
  85. return 0;
  86. }
  87. /*
  88. * Check Board Identity
  89. */
  90. int checkboard(void)
  91. {
  92. char *s = getenv("serial#");
  93. puts("Board: PDNB3");
  94. if (s != NULL) {
  95. puts(", serial# ");
  96. puts(s);
  97. }
  98. putc('\n');
  99. return (0);
  100. }
  101. int dram_init(void)
  102. {
  103. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  104. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  105. return (0);
  106. }
  107. int do_fpga_boot(unsigned char *fpgadata)
  108. {
  109. unsigned char *dst;
  110. int status;
  111. int index;
  112. int i;
  113. ulong len = CONFIG_SYS_MALLOC_LEN;
  114. /*
  115. * Setup GPIO's for FPGA programming
  116. */
  117. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
  118. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
  119. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
  120. /*
  121. * Save value so no readback is required upon programming
  122. */
  123. old_val = *IXP425_GPIO_GPOUTR;
  124. /*
  125. * First try to decompress fpga image (gzip compressed?)
  126. */
  127. dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
  128. if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  129. printf("Error: Image has to be gzipp'ed!\n");
  130. return -1;
  131. }
  132. status = fpga_boot(dst, len);
  133. if (status != 0) {
  134. printf("\nFPGA: Booting failed ");
  135. switch (status) {
  136. case ERROR_FPGA_PRG_INIT_LOW:
  137. printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  138. break;
  139. case ERROR_FPGA_PRG_INIT_HIGH:
  140. printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  141. break;
  142. case ERROR_FPGA_PRG_DONE:
  143. printf("(Timeout: DONE not high after programming FPGA)\n ");
  144. break;
  145. }
  146. /* display infos on fpgaimage */
  147. index = 15;
  148. for (i=0; i<4; i++) {
  149. len = dst[index];
  150. printf("FPGA: %s\n", &(dst[index+1]));
  151. index += len+3;
  152. }
  153. putc ('\n');
  154. /* delayed reboot */
  155. for (i=5; i>0; i--) {
  156. printf("Rebooting in %2d seconds \r",i);
  157. for (index=0;index<1000;index++)
  158. udelay(1000);
  159. }
  160. putc('\n');
  161. do_reset(NULL, 0, 0, NULL);
  162. }
  163. puts("FPGA: ");
  164. /* display infos on fpgaimage */
  165. index = 15;
  166. for (i=0; i<4; i++) {
  167. len = dst[index];
  168. printf("%s ", &(dst[index+1]));
  169. index += len+3;
  170. }
  171. putc('\n');
  172. free(dst);
  173. /*
  174. * Reset FPGA
  175. */
  176. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_FPGA_RESET);
  177. udelay(10);
  178. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
  179. return (0);
  180. }
  181. int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  182. {
  183. ulong addr;
  184. if (argc < 2) {
  185. cmd_usage(cmdtp);
  186. return 1;
  187. }
  188. addr = simple_strtoul(argv[1], NULL, 16);
  189. return do_fpga_boot((unsigned char *)addr);
  190. }
  191. U_BOOT_CMD(
  192. fpga, 2, 0, do_fpga,
  193. "fpga - boot FPGA\n",
  194. "address size\n - boot FPGA with gzipped image at <address>\n"
  195. );
  196. #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
  197. extern struct pci_controller hose;
  198. extern void pci_ixp_init(struct pci_controller * hose);
  199. void pci_init_board(void)
  200. {
  201. extern void pci_ixp_init (struct pci_controller *hose);
  202. pci_ixp_init(&hose);
  203. }
  204. #endif