conxs.c 3.5 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Stefano Babic, DENX Gmbh, sbabic@denx.de
  4. *
  5. * (C) Copyright 2004
  6. * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
  7. *
  8. * (C) Copyright 2002
  9. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  10. *
  11. * (C) Copyright 2002
  12. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  13. * Marius Groeger <mgroeger@sysgo.de>
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <common.h>
  34. #include <asm/arch/pxa-regs.h>
  35. #include <netdev.h>
  36. DECLARE_GLOBAL_DATA_PTR;
  37. #define RH_A_PSM (1 << 8) /* power switching mode */
  38. #define RH_A_NPS (1 << 9) /* no power switching */
  39. extern struct serial_device serial_ffuart_device;
  40. extern struct serial_device serial_btuart_device;
  41. extern struct serial_device serial_stuart_device;
  42. /* ------------------------------------------------------------------------- */
  43. /*
  44. * Miscelaneous platform dependent initialisations
  45. */
  46. void usb_board_init(void)
  47. {
  48. UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
  49. ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
  50. UHCHR |= UHCHR_FSBIR;
  51. while (UHCHR & UHCHR_FSBIR);
  52. UHCHR &= ~UHCHR_SSE;
  53. UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
  54. /* Clear any OTG Pin Hold */
  55. if (PSSR & PSSR_OTGPH)
  56. PSSR |= PSSR_OTGPH;
  57. UHCRHDA &= ~(RH_A_NPS);
  58. UHCRHDA |= RH_A_PSM;
  59. /* Set port power control mask bits, only 3 ports. */
  60. UHCRHDB |= (0x7<<17);
  61. }
  62. void usb_board_init_fail(void)
  63. {
  64. return;
  65. }
  66. void usb_board_stop(void)
  67. {
  68. UHCHR |= UHCHR_FHR;
  69. udelay(11);
  70. UHCHR &= ~UHCHR_FHR;
  71. UHCCOMS |= 1;
  72. udelay(10);
  73. CKEN &= ~CKEN10_USBHOST;
  74. puts("Called USB STOP\n");
  75. return;
  76. }
  77. int board_init (void)
  78. {
  79. /* memory and cpu-speed are setup before relocation */
  80. /* so we do _nothing_ here */
  81. /* arch number of ConXS Board */
  82. gd->bd->bi_arch_number = 776;
  83. /* adress of boot parameters */
  84. gd->bd->bi_boot_params = 0xa000003c;
  85. return 0;
  86. }
  87. int board_late_init(void)
  88. {
  89. #if defined(CONFIG_SERIAL_MULTI)
  90. char *console=getenv("boot_console");
  91. if ((strcmp(console,"serial_btuart") == 0) ||
  92. (strcmp(console,"serial_stuart") == 0) ||
  93. (strcmp(console,"serial_ffuart") == 0)) {
  94. setenv("stdout",console);
  95. setenv("stdin", console);
  96. setenv("stderr",console);
  97. } else {
  98. setenv("stdout", "serial");
  99. setenv("stdin", "serial");
  100. setenv("stderr", "serial");
  101. }
  102. #endif
  103. return 0;
  104. }
  105. struct serial_device *default_serial_console (void)
  106. {
  107. return &serial_ffuart_device;
  108. }
  109. int dram_init (void)
  110. {
  111. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  112. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  113. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  114. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  115. gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
  116. gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
  117. gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
  118. gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
  119. return 0;
  120. }
  121. #ifdef CONFIG_DRIVER_DM9000
  122. int board_eth_init(bd_t *bis)
  123. {
  124. return dm9000_initialize(bis);
  125. }
  126. #endif