omap5912osk.h 6.4 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments.
  4. * Kshitij Gupta <kshitij@ti.com>
  5. * Configuation settings for the TI OMAP Innovator board.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. /*
  28. * High Level Configuration Options
  29. * (easy to change)
  30. */
  31. #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
  32. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  33. #define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
  34. #define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
  35. #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
  36. #define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
  37. /* input clock of PLL */
  38. /* the OMAP5912 OSK has 12MHz input clock */
  39. #define CONFIG_SYS_CLK_FREQ 12000000
  40. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  41. #define CONFIG_MISC_INIT_R
  42. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  43. #define CONFIG_SETUP_MEMORY_TAGS 1
  44. #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */
  45. /*
  46. * Size of malloc() pool
  47. */
  48. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  49. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  50. /*
  51. * Hardware drivers
  52. */
  53. /*
  54. */
  55. #define CONFIG_DRIVER_LAN91C96
  56. #define CONFIG_LAN91C96_BASE 0x04800300
  57. #define CONFIG_LAN91C96_EXT_PHY
  58. /*
  59. * NS16550 Configuration
  60. */
  61. #define CFG_NS16550
  62. #define CFG_NS16550_SERIAL
  63. #define CFG_NS16550_REG_SIZE (-4)
  64. #define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
  65. #define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
  66. on helen */
  67. /*
  68. * select serial console configuration
  69. */
  70. #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP5912 OSK */
  71. /* allow to overwrite serial and ethaddr */
  72. #define CONFIG_ENV_OVERWRITE
  73. #define CONFIG_CONS_INDEX 1
  74. #define CONFIG_BAUDRATE 115200
  75. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  76. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
  77. #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
  78. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  79. #include <cmd_confdefs.h>
  80. #include <configs/omap1510.h>
  81. #define CONFIG_BOOTDELAY 3
  82. #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
  83. root=/dev/nfs rw nfsroot=157.87.82.48:\
  84. /home/mwd/myfs/target ip=dhcp"
  85. #define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
  86. #define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
  87. #define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
  88. #define CONFIG_BOOTFILE "uImage" /* file to load */
  89. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  90. #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
  91. #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
  92. #endif
  93. /*
  94. * Miscellaneous configurable options
  95. */
  96. #define CFG_LONGHELP /* undef to save memory */
  97. #define CFG_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */
  98. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  99. /* Print Buffer Size */
  100. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
  101. #define CFG_MAXARGS 16 /* max number of command args */
  102. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  103. #define CFG_MEMTEST_START 0x10000000 /* memtest works on */
  104. #define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
  105. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  106. #define CFG_LOAD_ADDR 0x10000000 /* default load address */
  107. /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
  108. * DPLL1. This time is further subdivided by a local divisor.
  109. */
  110. #define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
  111. #define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
  112. #define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
  113. /*-----------------------------------------------------------------------
  114. * Stack sizes
  115. *
  116. * The stack sizes are set up in start.S using the settings below
  117. */
  118. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  119. #ifdef CONFIG_USE_IRQ
  120. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  121. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  122. #endif
  123. /*-----------------------------------------------------------------------
  124. * Physical Memory Map
  125. */
  126. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  127. #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
  128. #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
  129. #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
  130. #define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
  131. #define CFG_FLASH_BASE PHYS_FLASH_1
  132. #define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
  133. /*-----------------------------------------------------------------------
  134. * FLASH driver setup
  135. */
  136. #define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
  137. #define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
  138. #define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
  139. #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
  140. #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
  141. #define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
  142. #define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
  143. #define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
  144. #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  145. /* timeout values are in ticks */
  146. #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
  147. #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
  148. /*-----------------------------------------------------------------------
  149. * FLASH and environment organization
  150. */
  151. #define CFG_ENV_IS_IN_FLASH 1
  152. /* addr of environment */
  153. #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
  154. #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
  155. #define CFG_ENV_OFFSET 0x20000 /* environment starts here */
  156. #endif /* __CONFIG_H */