serial_pl010.c 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. /*
  2. * (C) Copyright 2000
  3. * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  4. *
  5. * (C) Copyright 2004
  6. * ARM Ltd.
  7. * Philippe Robin, <philippe.robin@arm.com>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. /* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */
  28. /* Should be fairly simple to make it work with the PL010 as well */
  29. #include <common.h>
  30. #include <watchdog.h>
  31. #ifdef CFG_PL010_SERIAL
  32. #include "serial_pl011.h"
  33. #define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
  34. #define IO_READ(addr) (*(volatile unsigned int *)(addr))
  35. /* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */
  36. #define CONSOLE_PORT CONFIG_CONS_INDEX
  37. #define baudRate CONFIG_BAUDRATE
  38. static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
  39. #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
  40. static void pl010_putc (int portnum, char c);
  41. static int pl010_getc (int portnum);
  42. static int pl010_tstc (int portnum);
  43. int serial_init (void)
  44. {
  45. unsigned int divisor;
  46. /*
  47. ** First, disable everything.
  48. */
  49. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
  50. /*
  51. ** Set baud rate
  52. **
  53. */
  54. switch (baudRate) {
  55. case 9600:
  56. divisor = UART_PL010_BAUD_9600;
  57. break;
  58. case 19200:
  59. divisor = UART_PL010_BAUD_9600;
  60. break;
  61. case 38400:
  62. divisor = UART_PL010_BAUD_38400;
  63. break;
  64. case 57600:
  65. divisor = UART_PL010_BAUD_57600;
  66. break;
  67. case 115200:
  68. divisor = UART_PL010_BAUD_115200;
  69. break;
  70. default:
  71. divisor = UART_PL010_BAUD_38400;
  72. }
  73. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
  74. ((divisor & 0xf00) >> 8));
  75. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
  76. /*
  77. ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
  78. */
  79. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
  80. (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
  81. /*
  82. ** Finally, enable the UART
  83. */
  84. IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
  85. return (0);
  86. }
  87. void serial_putc (const char c)
  88. {
  89. if (c == '\n')
  90. pl010_putc (CONSOLE_PORT, '\r');
  91. pl010_putc (CONSOLE_PORT, c);
  92. }
  93. void serial_puts (const char *s)
  94. {
  95. while (*s) {
  96. serial_putc (*s++);
  97. }
  98. }
  99. int serial_getc (void)
  100. {
  101. return pl010_getc (CONSOLE_PORT);
  102. }
  103. int serial_tstc (void)
  104. {
  105. return pl010_tstc (CONSOLE_PORT);
  106. }
  107. void serial_setbrg (void)
  108. {
  109. }
  110. static void pl010_putc (int portnum, char c)
  111. {
  112. /* Wait until there is space in the FIFO */
  113. while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
  114. WATCHDOG_RESET();
  115. /* Send the character */
  116. IO_WRITE (port[portnum] + UART_PL01x_DR, c);
  117. }
  118. static int pl010_getc (int portnum)
  119. {
  120. unsigned int data;
  121. /* Wait until there is data in the FIFO */
  122. while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
  123. WATCHDOG_RESET();
  124. data = IO_READ (port[portnum] + UART_PL01x_DR);
  125. /* Check for an error flag */
  126. if (data & 0xFFFFFF00) {
  127. /* Clear the error */
  128. IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
  129. return -1;
  130. }
  131. return (int) data;
  132. }
  133. static int pl010_tstc (int portnum)
  134. {
  135. WATCHDOG_RESET();
  136. return !(IO_READ (port[portnum] + UART_PL01x_FR) &
  137. UART_PL01x_FR_RXFE);
  138. }
  139. #endif