srio.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137
  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. */
  19. #include <common.h>
  20. #include <config.h>
  21. #include <asm/fsl_law.h>
  22. #include <asm/fsl_serdes.h>
  23. #include <asm/fsl_srio.h>
  24. #define SRIO_PORT_ACCEPT_ALL 0x10000001
  25. #define SRIO_IB_ATMU_AR 0x80f55000
  26. #if defined(CONFIG_FSL_CORENET)
  27. #define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
  28. #define _DEVDISR_SRIO2 FSL_CORENET_DEVDISR_SRIO2
  29. #define _DEVDISR_RMU FSL_CORENET_DEVDISR_RMU
  30. #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
  31. #elif defined(CONFIG_MPC85xx)
  32. #define _DEVDISR_SRIO1 MPC85xx_DEVDISR_SRIO
  33. #define _DEVDISR_SRIO2 MPC85xx_DEVDISR_SRIO
  34. #define _DEVDISR_RMU MPC85xx_DEVDISR_RMSG
  35. #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
  36. #elif defined(CONFIG_MPC86xx)
  37. #define _DEVDISR_SRIO1 MPC86xx_DEVDISR_SRIO
  38. #define _DEVDISR_SRIO2 MPC86xx_DEVDISR_SRIO
  39. #define _DEVDISR_RMU MPC86xx_DEVDISR_RMSG
  40. #define CONFIG_SYS_MPC8xxx_GUTS_ADDR \
  41. (&((immap_t *)CONFIG_SYS_IMMR)->im_gur)
  42. #else
  43. #error "No defines for DEVDISR_SRIO"
  44. #endif
  45. void srio_init(void)
  46. {
  47. ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR;
  48. int srio1_used = 0, srio2_used = 0;
  49. if (is_serdes_configured(SRIO1)) {
  50. set_next_law(CONFIG_SYS_SRIO1_MEM_PHYS,
  51. law_size_bits(CONFIG_SYS_SRIO1_MEM_SIZE),
  52. LAW_TRGT_IF_RIO_1);
  53. srio1_used = 1;
  54. printf("SRIO1: enabled\n");
  55. } else {
  56. printf("SRIO1: disabled\n");
  57. }
  58. #ifdef CONFIG_SRIO2
  59. if (is_serdes_configured(SRIO2)) {
  60. set_next_law(CONFIG_SYS_SRIO2_MEM_PHYS,
  61. law_size_bits(CONFIG_SYS_SRIO2_MEM_SIZE),
  62. LAW_TRGT_IF_RIO_2);
  63. srio2_used = 1;
  64. printf("SRIO2: enabled\n");
  65. } else {
  66. printf("SRIO2: disabled\n");
  67. }
  68. #endif
  69. #ifdef CONFIG_FSL_CORENET
  70. /* On FSL_CORENET devices we can disable individual ports */
  71. if (!srio1_used)
  72. setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO1);
  73. if (!srio2_used)
  74. setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO2);
  75. #endif
  76. /* neither port is used - disable everything */
  77. if (!srio1_used && !srio2_used) {
  78. setbits_be32(&gur->devdisr, _DEVDISR_SRIO1);
  79. setbits_be32(&gur->devdisr, _DEVDISR_SRIO2);
  80. setbits_be32(&gur->devdisr, _DEVDISR_RMU);
  81. }
  82. }
  83. #ifdef CONFIG_SRIOBOOT_MASTER
  84. void srio_boot_master(void)
  85. {
  86. struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
  87. /* set port accept-all */
  88. out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
  89. SRIO_PORT_ACCEPT_ALL);
  90. debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
  91. CONFIG_SRIOBOOT_MASTER_PORT);
  92. /* configure inbound window5 for slave's u-boot image */
  93. debug("SRIOBOOT - MASTER: Inbound window 5 for slave's image; "
  94. "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
  95. (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
  96. (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
  97. CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
  98. out_be32((void *)&srio->atmu
  99. .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
  100. CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
  101. out_be32((void *)&srio->atmu
  102. .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
  103. CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
  104. out_be32((void *)&srio->atmu
  105. .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
  106. SRIO_IB_ATMU_AR
  107. | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
  108. /* configure inbound window4 for slave's u-boot image */
  109. debug("SRIOBOOT - MASTER: Inbound window 4 for slave's image; "
  110. "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
  111. (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
  112. (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
  113. CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
  114. out_be32((void *)&srio->atmu
  115. .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
  116. CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
  117. out_be32((void *)&srio->atmu
  118. .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
  119. CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
  120. out_be32((void *)&srio->atmu
  121. .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
  122. SRIO_IB_ATMU_AR
  123. | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
  124. }
  125. #endif