uboot-vybrid_public/doc/README.srio-boot-corenet

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SRIO Boot on Corenet Platforms
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For some PowerPC processors with SRIO interface, boot location can be configured
to SRIO by RCW. The processor booting from SRIO can do without flash for u-boot
image, ucode and ENV. All the images can be fetched from another processor's
memory space by SRIO link connected between them.

This document describes the processes based on an example implemented on P4080DS
platforms and a RCW example with boot from SRIO configuration.

Environment of the SRIO boot:
	a) Master and slave can be SOCs in one board or SOCs in separate boards.
	b) They are connected with SRIO links, whether 1x or 4x, and directly or
	   through switch system.
	c) Only Master has NorFlash for booting, and all the Master's and Slave's
	   U-Boot images, UCodes will be stored in this flash.
	d) Slave has its own EEPROM for RCW and PBI.
	e) Slave's RCW should configure the SerDes for SRIO boot port, set the boot
	   location to SRIO, and holdoff all the cores if needed.

	----------        -----------             -----------
	|		  |       |         |             |         |
	|		  |       |         |             |         |
	| NorFlash|<----->| Master  |    SRIO     |  Slave  |<---->[EEPROM]
	|		  |       |         |<===========>|         |
	|		  |       |         |             |         |
	----------        -----------             -----------

The example based on P4080DS platform:
	Two P4080DS platforms can be used to implement the boot from SRIO. Their SRIO
	ports 0 will be connected directly and will be used for the boot from SRIO.

	1. Slave's RCW example for boot from SRIO port 0 and core 0 not in holdoff.
		00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
		00000010: 1818 1818 0000 8888 7440 4000 0000 2000
		00000020: f400 0000 0100 0000 0000 0000 0000 0000
		00000030: 0000 0000 0083 0000 0000 0000 0000 0000
		00000040: 0000 0000 0000 0000 0813 8040 698b 93fe

	2. Slave's RCW example for boot from SRIO port 0 and all cores in holdoff.
		00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
		00000010: 1818 1818 0000 8888 7440 4000 0000 2000
		00000020: f440 0000 0100 0000 0000 0000 0000 0000
		00000030: 0000 0000 0083 0000 0000 0000 0000 0000
		00000040: 0000 0000 0000 0000 0813 8040 063c 778f

	3. Sequence in Step by Step.
		a) Update RCW for slave with boot from SRIO port 0 configuration.
		b) Program slave's U-Boot image, UCode, and ENV parameters into master's
		   NorFlash.
		c) Start up master and it will boot up normally from its NorFlash.
		   Then, it will finish necessary configurations for slave's boot from
		   SRIO port 0.
		d) Master will set inbound SRIO windows covered slave's U-Boot image stored
		   in master's NorFlash.
		e) Master will set an inbound SRIO window covered slave's UCode stored in
		   master's NorFlash.
		f) Master will set an inbound SRIO window covered slave's ENV stored in
		   master's NorFlash.
		g) If need to release slave's core, master will set outbound SRIO windows
		   in order to configure slave's registers for the core's releasing.
		h) If all cores of slave in holdoff, slave should be powered on before all
		   the above master's steps, and wait to be released by master. If not all
		   cores in holdoff, that means core 0 will start up normally, slave should
		   be powered on after all the above master's steps. In the startup phase
		   of the slave from SRIO, it will finish some necessary configurations.
		i) Slave will set a specific TLB entry for the boot process.
		j) Slave will set a LAW entry with the TargetID SRIO port 0 for the boot.
		k) Slave will set a specific TLB entry in order to fetch UCode and ENV
		   from master.
		l) Slave will set a LAW entry with the TargetID SRIO port 0 for UCode and ENV.

How to use this feature:
	To use this feature, you need to focus three points.

	1. Slave's RCW with SRIO boot configurations, and all cores in holdoff
	   configurations if needed.
	   Please refer to the examples given above.

	2. U-Boot image's compilation.
		For master, U-Boot image should be generated specifically by

				make xxxx_SRIOBOOT_MASTER_config.

		For example, master U-Boot image used on P4080DS should be compiled with

				make P4080DS_SRIOBOOT_MASTER_config.

		For slave, U-Boot image should be generated specifically by

				make xxxx_SRIOBOOT_SLAVE_config.

		For example, slave U-Boot image used on P4080DS should be compiled with

				make P4080DS_SRIOBOOT_SLAVE_config.

	3. Necessary modifications based on a specific environment.
		For a specific environment, the SRIO port for boot, the addresses of the
		slave's U-Boot image, UCode, ENV stored in master's NorFlash, and any other
		configurations can be modified in the file:
					include/configs/corenet_ds.h.