platform.h 3.1 KB

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  1. /*
  2. * Copyright (C) 2005-2006 Atmel Corporation
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef _ASM_AVR32_ARCH_PM_H
  23. #define _ASM_AVR32_ARCH_PM_H
  24. #include <config.h>
  25. enum clock_domain_id {
  26. CLOCK_CPU,
  27. CLOCK_HSB,
  28. CLOCK_PBA,
  29. CLOCK_PBB,
  30. NR_CLOCK_DOMAINS,
  31. };
  32. enum resource_type {
  33. RESOURCE_GPIO,
  34. RESOURCE_CLOCK,
  35. };
  36. enum gpio_func {
  37. GPIO_FUNC_GPIO,
  38. GPIO_FUNC_A,
  39. GPIO_FUNC_B,
  40. };
  41. enum device_id {
  42. DEVICE_HEBI,
  43. DEVICE_PBA_BRIDGE,
  44. DEVICE_PBB_BRIDGE,
  45. DEVICE_HRAMC,
  46. /* GPIO controllers must be kept together */
  47. DEVICE_PIOA,
  48. DEVICE_PIOB,
  49. DEVICE_PIOC,
  50. DEVICE_PIOD,
  51. DEVICE_PIOE,
  52. DEVICE_SM,
  53. DEVICE_INTC,
  54. DEVICE_HMATRIX,
  55. #if defined(CFG_HPDC)
  56. DEVICE_HPDC,
  57. #endif
  58. #if defined(CFG_MACB0)
  59. DEVICE_MACB0,
  60. #endif
  61. #if defined(CFG_MACB1)
  62. DEVICE_MACB1,
  63. #endif
  64. #if defined(CFG_LCDC)
  65. DEVICE_LCDC,
  66. #endif
  67. #if defined(CFG_USART0)
  68. DEVICE_USART0,
  69. #endif
  70. #if defined(CFG_USART1)
  71. DEVICE_USART1,
  72. #endif
  73. #if defined(CFG_USART2)
  74. DEVICE_USART2,
  75. #endif
  76. #if defined(CFG_USART3)
  77. DEVICE_USART3,
  78. #endif
  79. #if defined(CFG_MMCI)
  80. DEVICE_MMCI,
  81. #endif
  82. #if defined(CFG_DMAC)
  83. DEVICE_DMAC,
  84. #endif
  85. NR_DEVICES,
  86. NO_DEVICE = -1,
  87. };
  88. struct resource {
  89. enum resource_type type;
  90. union {
  91. struct {
  92. unsigned long base;
  93. } iomem;
  94. struct {
  95. unsigned char nr_pins;
  96. enum device_id gpio_dev;
  97. enum gpio_func func;
  98. unsigned short start;
  99. } gpio;
  100. struct {
  101. enum clock_domain_id id;
  102. unsigned char index;
  103. } clock;
  104. } u;
  105. };
  106. struct device {
  107. void *regs;
  108. unsigned int nr_resources;
  109. const struct resource *resource;
  110. };
  111. struct clock_domain {
  112. unsigned short reg;
  113. enum clock_domain_id id;
  114. enum device_id bridge;
  115. };
  116. extern const struct device chip_device[NR_DEVICES];
  117. extern const struct clock_domain chip_clock[NR_CLOCK_DOMAINS];
  118. /**
  119. * Set up PIO, clock management and I/O memory for a device.
  120. */
  121. const struct device *get_device(enum device_id devid);
  122. void put_device(const struct device *dev);
  123. int gpio_set_func(enum device_id gpio_devid, unsigned int start,
  124. unsigned int nr_pins, enum gpio_func func);
  125. void gpio_free(enum device_id gpio_devid, unsigned int start,
  126. unsigned int nr_pins);
  127. void pm_init(void);
  128. int pm_enable_clock(enum clock_domain_id id, unsigned int index);
  129. void pm_disable_clock(enum clock_domain_id id, unsigned int index);
  130. unsigned long pm_get_clock_freq(enum clock_domain_id domain);
  131. void cpu_enable_sdram(void);
  132. #endif /* _ASM_AVR32_ARCH_PM_H */