integrator-common.h 3.9 KB

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  1. /*
  2. * (C) Copyright 2012
  3. * Linaro
  4. * Linus Walleij <linus.walleij@linaro.org>
  5. * Common ARM Integrator configuration settings
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #define CONFIG_INTEGRATOR
  26. #define CONFIG_SYS_TEXT_BASE 0x01000000
  27. #define CONFIG_SYS_MEMTEST_START 0x100000
  28. #define CONFIG_SYS_MEMTEST_END 0x10000000
  29. #define CONFIG_SYS_HZ 1000
  30. #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
  31. #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
  32. #define CONFIG_SYS_LONGHELP
  33. #define CONFIG_SYS_HUSH_PARSER
  34. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
  35. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  36. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  37. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
  38. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
  39. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  40. #define CONFIG_SETUP_MEMORY_TAGS
  41. #define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
  42. #define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
  43. /*
  44. * There are various dependencies on the core module (CM) fitted
  45. * Users should refer to their CM user guide
  46. */
  47. #include "armcoremodule.h"
  48. /*
  49. * Initialize and remap the core module, use SPD to detect memory size
  50. * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
  51. * the core module has a CM_INIT register
  52. * then the U-Boot initialisation code will
  53. * e.g. ARM Boot Monitor or pre-loader is repeated once
  54. * (to re-initialise any existing CM_INIT settings to safe values).
  55. *
  56. * This is usually not the desired behaviour since the platform
  57. * will either reboot into the ARM monitor (or pre-loader)
  58. * or continuously cycle thru it without U-Boot running,
  59. * depending upon the setting of Integrator/CP switch S2-4.
  60. *
  61. * However it may be needed if Integrator/CP switch S2-1
  62. * is set OFF to boot direct into U-Boot.
  63. * In that case comment out the line below.
  64. */
  65. #define CONFIG_CM_INIT
  66. #define CONFIG_CM_REMAP
  67. #define CONFIG_CM_SPD_DETECT
  68. /*
  69. * The ARM boot monitor initializes the board.
  70. * However, the default U-Boot code also performs the initialization.
  71. * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
  72. * - see documentation supplied with board for details of how to choose the
  73. * image to run at reset/power up
  74. * e.g. whether the ARM Boot Monitor runs before U-Boot
  75. */
  76. /* #define CONFIG_SKIP_LOWLEVEL_INIT */
  77. /*
  78. * The ARM boot monitor does not relocate U-Boot.
  79. * However, the default U-Boot code performs the relocation check,
  80. * and may relocate the code if the memory map is changed.
  81. * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
  82. */
  83. /* #define SKIP_CONFIG_RELOCATE_UBOOT */
  84. /*
  85. * Physical Memory Map
  86. */
  87. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  88. #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
  89. #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
  90. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  91. #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
  92. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
  93. CONFIG_SYS_INIT_RAM_SIZE - \
  94. GENERATED_GBL_DATA_SIZE)
  95. #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET