motionpro.h 11 KB

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  1. /*
  2. * (C) Copyright 2003-2007
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * Based on PRO Motion board config file by Andy Joseph, andy@promessdev.com
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. /*
  28. * High Level Configuration Options
  29. */
  30. /* CPU and board */
  31. #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
  32. #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
  33. #define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */
  34. /*
  35. * Command line configuration.
  36. */
  37. #include <config_cmd_default.h>
  38. #define CONFIG_CMD_ASKENV
  39. #define CONFIG_CMD_DHCP
  40. #define CONFIG_CMD_REGINFO
  41. #define CONFIG_CMD_IMMAP
  42. #define CONFIG_CMD_ELF
  43. #define CONFIG_CMD_MII
  44. #define CONFIG_CMD_BEDBUG
  45. #define CONFIG_CMD_NET
  46. #define CONFIG_CMD_PING
  47. #define CONFIG_CMD_IDE
  48. #define CONFIG_CMD_FAT
  49. #define CONFIG_CMD_JFFS2
  50. #define CONFIG_CMD_I2C
  51. #define CONFIG_CMD_DATE
  52. #define CONFIG_CMD_EEPROM
  53. #define CONFIG_CMD_DTT
  54. /*
  55. * Serial console configuration
  56. */
  57. #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
  58. #define CONFIG_NETCONSOLE 1 /* network console */
  59. #define CONFIG_BAUDRATE 115200
  60. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
  61. /*
  62. * Ethernet configuration
  63. */
  64. #define CONFIG_MPC5xxx_FEC 1
  65. #define CONFIG_PHY_ADDR 0x2
  66. #define CONFIG_PHY_TYPE 0x79c874
  67. #define CONFIG_RESET_PHY_R 1
  68. /*
  69. * Autobooting
  70. */
  71. #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
  72. #define CONFIG_AUTOBOOT_KEYED
  73. #define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b"
  74. #define DEBUG_BOOTKEYS 0
  75. #undef CONFIG_AUTOBOOT_DELAY_STR
  76. #undef CONFIG_BOOTARGS
  77. #define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
  78. "press \"<Esc><Esc>\" to stop\n"
  79. #define CONFIG_ETHADDR 00:50:C2:40:10:00
  80. #define CONFIG_OVERWRITE_ETHADDR_ONCE 1
  81. #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
  82. /*
  83. * Default environment settings
  84. */
  85. #define CONFIG_EXTRA_ENV_SETTINGS \
  86. "netdev=eth0\0" \
  87. "hostname=motionpro\0" \
  88. "netmask=255.255.0.0\0" \
  89. "ipaddr=192.168.160.22\0" \
  90. "serverip=192.168.1.1\0" \
  91. "gatewayip=192.168.1.1\0" \
  92. "console=ttyPSC0,115200\0" \
  93. "u-boot_addr=100000\0" \
  94. "kernel_addr=200000\0" \
  95. "fdt_addr=400000\0" \
  96. "ramdisk_addr=500000\0" \
  97. "multi_image_addr=800000\0" \
  98. "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
  99. "u-boot=/tftpboot/motionpro/u-boot.bin\0" \
  100. "bootfile=/tftpboot/motionpro/uImage\0" \
  101. "fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
  102. "ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
  103. "multi_image_file=kernel+initrd+dtb.img\0" \
  104. "load=tftp ${u-boot_addr} ${u-boot}\0" \
  105. "update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \
  106. "cp.b ${u-boot_addr} fff00000 ${filesize};" \
  107. "prot on fff00000 fff3ffff\0" \
  108. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  109. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  110. "nfsroot=${serverip}:${rootpath}\0" \
  111. "fat_args=setenv bootargs rw\0" \
  112. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  113. "addip=setenv bootargs ${bootargs} " \
  114. "ip=${ipaddr}:${serverip}:${gatewayip}:" \
  115. "${netmask}:${hostname}:${netdev}:off panic=1 " \
  116. "console=${console}\0" \
  117. "net_nfs=tftp ${kernel_addr} ${bootfile}; " \
  118. "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; " \
  119. "bootm ${kernel_addr} - ${fdt_addr}\0" \
  120. "net_self=tftp ${kernel_addr} ${bootfile}; " \
  121. "tftp ${fdt_addr} ${fdt_file}; " \
  122. "tftp ${ramdisk_addr} ${ramdisk_file}; " \
  123. "run ramargs addip; " \
  124. "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
  125. "fat_multi=run fat_args addip; fatload ide 0:1 " \
  126. "${multi_image_addr} ${multi_image_file}; " \
  127. "bootm ${multi_image_addr}\0" \
  128. ""
  129. #define CONFIG_BOOTCOMMAND "run net_nfs"
  130. /*
  131. * do board-specific init
  132. */
  133. #define CONFIG_BOARD_EARLY_INIT_R 1
  134. /*
  135. * Low level configuration
  136. */
  137. /*
  138. * Clock configuration: SYS_XTALIN = 25MHz
  139. */
  140. #define CFG_MPC5XXX_CLKIN 25000000
  141. /*
  142. * Set IPB speed to 100MHz
  143. */
  144. #define CFG_IPBCLK_EQUALS_XLBCLK
  145. /*
  146. * Memory map
  147. */
  148. /*
  149. * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
  150. * Setting MBAR to otherwise will cause system hang when using SmartDMA such
  151. * as network commands.
  152. */
  153. #define CFG_MBAR 0xf0000000
  154. #define CFG_SDRAM_BASE 0x00000000
  155. /*
  156. * If building for running out of SDRAM, then MBAR has been set up beforehand
  157. * (e.g., by the BDI). Otherwise we must specify the default boot-up value of
  158. * MBAR, as given in the doccumentation.
  159. */
  160. #if TEXT_BASE == 0x00100000
  161. #define CFG_DEFAULT_MBAR 0xf0000000
  162. #else /* TEXT_BASE != 0x00100000 */
  163. #define CFG_DEFAULT_MBAR 0x80000000
  164. #define CFG_LOWBOOT 1
  165. #endif /* TEXT_BASE == 0x00100000 */
  166. /* Use SRAM until RAM will be available */
  167. #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
  168. #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
  169. #define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */
  170. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  171. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  172. #define CFG_MONITOR_BASE TEXT_BASE
  173. #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
  174. #define CFG_RAMBOOT 1
  175. #endif
  176. #define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */
  177. #define CFG_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */
  178. #define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
  179. /*
  180. * Chip selects configuration
  181. */
  182. /* Boot Chipselect */
  183. #define CFG_BOOTCS_START CFG_FLASH_BASE
  184. #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
  185. #define CFG_BOOTCS_CFG 0x03035D00
  186. /* Flash memory addressing */
  187. #define CFG_CS0_START CFG_FLASH_BASE
  188. #define CFG_CS0_SIZE CFG_FLASH_SIZE
  189. #define CFG_CS0_CFG CFG_BOOTCS_CFG
  190. /* Dual Port SRAM -- Kollmorgen Drive memory addressing */
  191. #define CFG_CS1_START 0x50000000
  192. #define CFG_CS1_SIZE 0x10000
  193. #define CFG_CS1_CFG 0x05055800
  194. /* Local register access */
  195. #define CFG_CS2_START 0x50010000
  196. #define CFG_CS2_SIZE 0x10000
  197. #define CFG_CS2_CFG 0x05055800
  198. /* Anybus CompactCom Module memory addressing */
  199. #define CFG_CS3_START 0x50020000
  200. #define CFG_CS3_SIZE 0x10000
  201. #define CFG_CS3_CFG 0x05055800
  202. /* No burst and dead cycle = 2 for all CSs */
  203. #define CFG_CS_BURST 0x00000000
  204. #define CFG_CS_DEADCYCLE 0x22222222
  205. /*
  206. * SDRAM configuration
  207. */
  208. /* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */
  209. #define SDRAM_CONFIG1 0x52222600
  210. #define SDRAM_CONFIG2 0x88b70000
  211. #define SDRAM_CONTROL 0x50570000
  212. #define SDRAM_MODE 0x008d0000
  213. /*
  214. * Flash configuration
  215. */
  216. #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
  217. #define CFG_FLASH_CFI_DRIVER 1
  218. #define CFG_FLASH_BASE 0xff000000
  219. #define CFG_FLASH_SIZE 0x01000000
  220. #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
  221. #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  222. #define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
  223. #define CONFIG_FLASH_16BIT /* Flash is 16-bit */
  224. /*
  225. * MTD configuration
  226. */
  227. #define CONFIG_JFFS2_CMDLINE
  228. #define MTDIDS_DEFAULT "nor0=motionpro-0"
  229. #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
  230. "13m(fs),2m(kernel),256k(uboot)," \
  231. "64k(env),64k(redund_env),64k(dtb)," \
  232. "-(user_data)"
  233. /*
  234. * IDE/ATA configuration
  235. */
  236. #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
  237. #define CFG_IDE_MAXBUS 1
  238. #define CFG_IDE_MAXDEVICE 1
  239. #define CONFIG_IDE_PREINIT
  240. #define CFG_ATA_DATA_OFFSET 0x0060
  241. #define CFG_ATA_REG_OFFSET CFG_ATA_DATA_OFFSET
  242. #define CFG_ATA_STRIDE 4
  243. #define CONFIG_DOS_PARTITION
  244. /*
  245. * I2C configuration
  246. */
  247. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  248. #define CFG_I2C_MODULE 2 /* select I2C module #2 */
  249. #define CFG_I2C_SPEED 100000 /* 100 kHz */
  250. #define CFG_I2C_SLAVE 0x7F
  251. /*
  252. * EEPROM configuration
  253. */
  254. #define CFG_I2C_EEPROM_ADDR_LEN 1
  255. #define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */
  256. #define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
  257. #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
  258. #define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
  259. /*
  260. * RTC configuration
  261. */
  262. #define CONFIG_RTC_DS1337 1
  263. #define CFG_I2C_RTC_ADDR 0x68
  264. /*
  265. * Status LED configuration
  266. */
  267. #define CONFIG_STATUS_LED /* Status LED enabled */
  268. #define CONFIG_BOARD_SPECIFIC_LED
  269. #define ENABLE_GPIO_OUT 0x00000024
  270. #define LED_ON 0x00000010
  271. #ifndef __ASSEMBLY__
  272. /*
  273. * In case of Motion-PRO, a LED is identified by its corresponding
  274. * GPT Enable and Mode Select Register.
  275. */
  276. typedef volatile unsigned long * led_id_t;
  277. extern void __led_init(led_id_t id, int state);
  278. extern void __led_toggle(led_id_t id);
  279. extern void __led_set(led_id_t id, int state);
  280. #endif /* __ASSEMBLY__ */
  281. /*
  282. * Temperature sensor
  283. */
  284. #define CONFIG_DTT_LM75 1
  285. #define CONFIG_DTT_SENSORS { 0x49 }
  286. /*
  287. * Environment settings
  288. */
  289. #define CFG_ENV_IS_IN_FLASH 1
  290. /* This has to be a multiple of the Flash sector size */
  291. #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
  292. #define CFG_ENV_SIZE 0x1000
  293. #define CFG_ENV_SECT_SIZE 0x10000
  294. /* Configuration of redundant environment */
  295. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
  296. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  297. /*
  298. * Pin multiplexing configuration
  299. */
  300. /* PSC1: UART1
  301. * PSC2: GPIO (default)
  302. * PSC3: GPIO (default)
  303. * USB: 2xUART4/5
  304. * Ethernet: Ethernet 100Mbit with MD
  305. * Timer: CAN2/GPIO
  306. * PSC6/IRDA: GPIO (default)
  307. */
  308. #define CFG_GPS_PORT_CONFIG 0x1105a004
  309. /*
  310. * Motion-PRO's CPLD revision control register
  311. */
  312. #define CPLD_REV_REGISTER (CFG_CS2_START + 0x06)
  313. /*
  314. * Miscellaneous configurable options
  315. */
  316. #define CFG_LONGHELP /* undef to save memory */
  317. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  318. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  319. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  320. #define CFG_MAXARGS 16 /* max number of command args */
  321. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  322. #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
  323. #define CFG_MEMTEST_END 0x03f00000 /* 1 ... 64 MiB in DRAM */
  324. #define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */
  325. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  326. /*
  327. * Various low-level settings
  328. */
  329. #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
  330. #define CFG_HID0_FINAL HID0_ICE
  331. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  332. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  333. #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
  334. /* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
  335. #define CFG_RESET_ADDRESS 0xfff00100
  336. /* pass open firmware flat tree */
  337. #define CONFIG_OF_FLAT_TREE 1
  338. #define CONFIG_OF_BOARD_SETUP 1
  339. /* maximum size of the flat tree (8K) */
  340. #define OF_FLAT_TREE_MAX_SIZE 8192
  341. #define OF_CPU "PowerPC,5200@0"
  342. #define OF_SOC "soc5200@f0000000"
  343. #define OF_TBCLK (bd->bi_busfreq / 4)
  344. #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
  345. #endif /* __CONFIG_H */