oftree.dts 4.1 KB

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  1. /*
  2. * MPC8641 HPCN Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8641HPCN";
  13. compatible = "mpc86xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #cpus = <1>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. linux,phandle = <200>;
  22. PowerPC,8641@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <8000>; // L1, 32K
  28. i-cache-size = <8000>; // L1, 32K
  29. timebase-frequency = <0>; // 33 MHz, from uboot
  30. bus-frequency = <0>; // 166 MHz
  31. clock-frequency = <0>; // 825 MHz, from uboot
  32. 32-bit;
  33. linux,phandle = <201>;
  34. linux,boot-cpu;
  35. };
  36. };
  37. memory {
  38. device_type = "memory";
  39. linux,phandle = <300>;
  40. reg = <00000000 10000000>; // 256M at 0x0
  41. };
  42. soc8641@f8000000 {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. #interrupt-cells = <2>;
  46. device_type = "soc";
  47. ranges = <0 f8000000 00100000>;
  48. reg = <f8000000 00100000>; // CCSRBAR 1M
  49. bus-frequency = <0>;
  50. i2c@3000 {
  51. device_type = "i2c";
  52. compatible = "fsl-i2c";
  53. reg = <3000 100>;
  54. interrupts = <1b 0>;
  55. interrupt-parent = <40000>;
  56. dfsrr;
  57. };
  58. mdio@24520 {
  59. #address-cells = <1>;
  60. #size-cells = <0>;
  61. device_type = "mdio";
  62. compatible = "gianfar";
  63. reg = <24520 20>;
  64. linux,phandle = <24520>;
  65. ethernet-phy@0 {
  66. linux,phandle = <2452000>;
  67. interrupt-parent = <40000>;
  68. interrupts = <35 0>;
  69. reg = <0>;
  70. device_type = "ethernet-phy";
  71. };
  72. ethernet-phy@1 {
  73. linux,phandle = <2452001>;
  74. interrupt-parent = <40000>;
  75. interrupts = <35 0>;
  76. reg = <1>;
  77. device_type = "ethernet-phy";
  78. };
  79. ethernet-phy@2 {
  80. linux,phandle = <2452002>;
  81. interrupt-parent = <40000>;
  82. interrupts = <35 0>;
  83. reg = <2>;
  84. device_type = "ethernet-phy";
  85. };
  86. ethernet-phy@3 {
  87. linux,phandle = <2452003>;
  88. interrupt-parent = <40000>;
  89. interrupts = <35 0>;
  90. reg = <3>;
  91. device_type = "ethernet-phy";
  92. };
  93. };
  94. ethernet@24000 {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. device_type = "network";
  98. model = "TSEC";
  99. compatible = "gianfar";
  100. reg = <24000 1000>;
  101. address = [ 00 E0 0C 00 73 00 ];
  102. interrupts = <d 3 e 3 12 3>;
  103. interrupt-parent = <40000>;
  104. phy-handle = <2452000>;
  105. };
  106. ethernet@25000 {
  107. #address-cells = <1>;
  108. #size-cells = <0>;
  109. device_type = "network";
  110. model = "TSEC";
  111. compatible = "gianfar";
  112. reg = <25000 1000>;
  113. address = [ 00 E0 0C 00 73 01 ];
  114. interrupts = <13 3 14 3 18 3>;
  115. interrupt-parent = <40000>;
  116. phy-handle = <2452001>;
  117. };
  118. ethernet@26000 {
  119. #address-cells = <1>;
  120. #size-cells = <0>;
  121. device_type = "network";
  122. model = "TSEC";
  123. compatible = "gianfar";
  124. reg = <26000 1000>;
  125. address = [ 00 E0 0C 00 02 FD ];
  126. interrupts = <F 3 10 3 11 3>;
  127. interrupt-parent = <40000>;
  128. phy-handle = <2452002>;
  129. };
  130. ethernet@27000 {
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. device_type = "network";
  134. model = "TSEC";
  135. compatible = "gianfar";
  136. reg = <27000 1000>;
  137. address = [ 00 E0 0C 00 03 FD ];
  138. interrupts = <15 3 16 3 17 3>;
  139. interrupt-parent = <40000>;
  140. phy-handle = <2452003>;
  141. };
  142. serial@4500 {
  143. device_type = "serial";
  144. compatible = "ns16550";
  145. reg = <4500 100>; // reg base, size
  146. clock-frequency = <0>; // should we fill in in uboot?
  147. interrupts = <1a 3>;
  148. interrupt-parent = <40000>;
  149. };
  150. serial@4600 {
  151. device_type = "serial";
  152. compatible = "ns16550";
  153. reg = <4600 100>; // reg base, size
  154. clock-frequency = <0>; // should we fill in in uboot?
  155. interrupts = <1a 3>;
  156. interrupt-parent = <40000>;
  157. };
  158. pic@40000 {
  159. linux,phandle = <40000>;
  160. clock-frequency = <0>;
  161. interrupt-controller;
  162. #address-cells = <0>;
  163. #interrupt-cells = <2>;
  164. reg = <40000 40000>;
  165. built-in;
  166. compatible = "chrp,open-pic";
  167. device_type = "open-pic";
  168. big-endian;
  169. };
  170. };
  171. };