designware_i2c.c 9.0 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/io.h>
  25. #include <asm/arch/hardware.h>
  26. #include "designware_i2c.h"
  27. #ifdef CONFIG_I2C_MULTI_BUS
  28. static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
  29. static unsigned int current_bus = 0;
  30. #endif
  31. static struct i2c_regs *i2c_regs_p =
  32. (struct i2c_regs *)CONFIG_SYS_I2C_BASE;
  33. /*
  34. * set_speed - Set the i2c speed mode (standard, high, fast)
  35. * @i2c_spd: required i2c speed mode
  36. *
  37. * Set the i2c speed mode (standard, high, fast)
  38. */
  39. static void set_speed(int i2c_spd)
  40. {
  41. unsigned int cntl;
  42. unsigned int hcnt, lcnt;
  43. unsigned int enbl;
  44. /* to set speed cltr must be disabled */
  45. enbl = readl(&i2c_regs_p->ic_enable);
  46. enbl &= ~IC_ENABLE_0B;
  47. writel(enbl, &i2c_regs_p->ic_enable);
  48. cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK));
  49. switch (i2c_spd) {
  50. case IC_SPEED_MODE_MAX:
  51. cntl |= IC_CON_SPD_HS;
  52. hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
  53. writel(hcnt, &i2c_regs_p->ic_hs_scl_hcnt);
  54. lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
  55. writel(lcnt, &i2c_regs_p->ic_hs_scl_lcnt);
  56. break;
  57. case IC_SPEED_MODE_STANDARD:
  58. cntl |= IC_CON_SPD_SS;
  59. hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
  60. writel(hcnt, &i2c_regs_p->ic_ss_scl_hcnt);
  61. lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
  62. writel(lcnt, &i2c_regs_p->ic_ss_scl_lcnt);
  63. break;
  64. case IC_SPEED_MODE_FAST:
  65. default:
  66. cntl |= IC_CON_SPD_FS;
  67. hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
  68. writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt);
  69. lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
  70. writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt);
  71. break;
  72. }
  73. writel(cntl, &i2c_regs_p->ic_con);
  74. /* Enable back i2c now speed set */
  75. enbl |= IC_ENABLE_0B;
  76. writel(enbl, &i2c_regs_p->ic_enable);
  77. }
  78. /*
  79. * i2c_set_bus_speed - Set the i2c speed
  80. * @speed: required i2c speed
  81. *
  82. * Set the i2c speed.
  83. */
  84. int i2c_set_bus_speed(int speed)
  85. {
  86. if (speed >= I2C_MAX_SPEED)
  87. set_speed(IC_SPEED_MODE_MAX);
  88. else if (speed >= I2C_FAST_SPEED)
  89. set_speed(IC_SPEED_MODE_FAST);
  90. else
  91. set_speed(IC_SPEED_MODE_STANDARD);
  92. return 0;
  93. }
  94. /*
  95. * i2c_get_bus_speed - Gets the i2c speed
  96. *
  97. * Gets the i2c speed.
  98. */
  99. int i2c_get_bus_speed(void)
  100. {
  101. u32 cntl;
  102. cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK);
  103. if (cntl == IC_CON_SPD_HS)
  104. return I2C_MAX_SPEED;
  105. else if (cntl == IC_CON_SPD_FS)
  106. return I2C_FAST_SPEED;
  107. else if (cntl == IC_CON_SPD_SS)
  108. return I2C_STANDARD_SPEED;
  109. return 0;
  110. }
  111. /*
  112. * i2c_init - Init function
  113. * @speed: required i2c speed
  114. * @slaveadd: slave address for the device
  115. *
  116. * Initialization function.
  117. */
  118. void i2c_init(int speed, int slaveadd)
  119. {
  120. unsigned int enbl;
  121. /* Disable i2c */
  122. enbl = readl(&i2c_regs_p->ic_enable);
  123. enbl &= ~IC_ENABLE_0B;
  124. writel(enbl, &i2c_regs_p->ic_enable);
  125. writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con);
  126. writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl);
  127. writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl);
  128. i2c_set_bus_speed(speed);
  129. writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask);
  130. writel(slaveadd, &i2c_regs_p->ic_sar);
  131. /* Enable i2c */
  132. enbl = readl(&i2c_regs_p->ic_enable);
  133. enbl |= IC_ENABLE_0B;
  134. writel(enbl, &i2c_regs_p->ic_enable);
  135. #ifdef CONFIG_I2C_MULTI_BUS
  136. bus_initialized[current_bus] = 1;
  137. #endif
  138. }
  139. /*
  140. * i2c_setaddress - Sets the target slave address
  141. * @i2c_addr: target i2c address
  142. *
  143. * Sets the target slave address.
  144. */
  145. static void i2c_setaddress(unsigned int i2c_addr)
  146. {
  147. writel(i2c_addr, &i2c_regs_p->ic_tar);
  148. }
  149. /*
  150. * i2c_flush_rxfifo - Flushes the i2c RX FIFO
  151. *
  152. * Flushes the i2c RX FIFO
  153. */
  154. static void i2c_flush_rxfifo(void)
  155. {
  156. while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE)
  157. readl(&i2c_regs_p->ic_cmd_data);
  158. }
  159. /*
  160. * i2c_wait_for_bb - Waits for bus busy
  161. *
  162. * Waits for bus busy
  163. */
  164. static int i2c_wait_for_bb(void)
  165. {
  166. unsigned long start_time_bb = get_timer(0);
  167. while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) ||
  168. !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) {
  169. /* Evaluate timeout */
  170. if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
  171. return 1;
  172. }
  173. return 0;
  174. }
  175. /* check parameters for i2c_read and i2c_write */
  176. static int check_params(uint addr, int alen, uchar *buffer, int len)
  177. {
  178. if (buffer == NULL) {
  179. printf("Buffer is invalid\n");
  180. return 1;
  181. }
  182. if (alen > 1) {
  183. printf("addr len %d not supported\n", alen);
  184. return 1;
  185. }
  186. if (addr + len > 256) {
  187. printf("address out of range\n");
  188. return 1;
  189. }
  190. return 0;
  191. }
  192. static int i2c_xfer_init(uchar chip, uint addr)
  193. {
  194. if (i2c_wait_for_bb())
  195. return 1;
  196. i2c_setaddress(chip);
  197. writel(addr, &i2c_regs_p->ic_cmd_data);
  198. return 0;
  199. }
  200. static int i2c_xfer_finish(void)
  201. {
  202. ulong start_stop_det = get_timer(0);
  203. while (1) {
  204. if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) {
  205. readl(&i2c_regs_p->ic_clr_stop_det);
  206. break;
  207. } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
  208. break;
  209. }
  210. }
  211. if (i2c_wait_for_bb()) {
  212. printf("Timed out waiting for bus\n");
  213. return 1;
  214. }
  215. i2c_flush_rxfifo();
  216. /* Wait for read/write operation to complete on actual memory */
  217. udelay(10000);
  218. return 0;
  219. }
  220. /*
  221. * i2c_read - Read from i2c memory
  222. * @chip: target i2c address
  223. * @addr: address to read from
  224. * @alen:
  225. * @buffer: buffer for read data
  226. * @len: no of bytes to be read
  227. *
  228. * Read from i2c memory.
  229. */
  230. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
  231. {
  232. unsigned long start_time_rx;
  233. if (check_params(addr, alen, buffer, len))
  234. return 1;
  235. if (i2c_xfer_init(chip, addr))
  236. return 1;
  237. start_time_rx = get_timer(0);
  238. while (len) {
  239. if (len == 1)
  240. writel(IC_CMD | IC_STOP, &i2c_regs_p->ic_cmd_data);
  241. else
  242. writel(IC_CMD, &i2c_regs_p->ic_cmd_data);
  243. if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) {
  244. *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data);
  245. len--;
  246. start_time_rx = get_timer(0);
  247. } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
  248. return 1;
  249. }
  250. }
  251. return i2c_xfer_finish();
  252. }
  253. /*
  254. * i2c_write - Write to i2c memory
  255. * @chip: target i2c address
  256. * @addr: address to read from
  257. * @alen:
  258. * @buffer: buffer for read data
  259. * @len: no of bytes to be read
  260. *
  261. * Write to i2c memory.
  262. */
  263. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
  264. {
  265. int nb = len;
  266. unsigned long start_time_tx;
  267. if (check_params(addr, alen, buffer, len))
  268. return 1;
  269. if (i2c_xfer_init(chip, addr))
  270. return 1;
  271. start_time_tx = get_timer(0);
  272. while (len) {
  273. if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) {
  274. if (--len == 0)
  275. writel(*buffer | IC_STOP, &i2c_regs_p->ic_cmd_data);
  276. else
  277. writel(*buffer, &i2c_regs_p->ic_cmd_data);
  278. buffer++;
  279. start_time_tx = get_timer(0);
  280. } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
  281. printf("Timed out. i2c write Failed\n");
  282. return 1;
  283. }
  284. }
  285. return i2c_xfer_finish();
  286. }
  287. /*
  288. * i2c_probe - Probe the i2c chip
  289. */
  290. int i2c_probe(uchar chip)
  291. {
  292. u32 tmp;
  293. int ret;
  294. /*
  295. * Try to read the first location of the chip.
  296. */
  297. ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
  298. if (ret)
  299. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  300. return ret;
  301. }
  302. #ifdef CONFIG_I2C_MULTI_BUS
  303. int i2c_set_bus_num(unsigned int bus)
  304. {
  305. switch (bus) {
  306. case 0:
  307. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
  308. break;
  309. #ifdef CONFIG_SYS_I2C_BASE1
  310. case 1:
  311. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
  312. break;
  313. #endif
  314. #ifdef CONFIG_SYS_I2C_BASE2
  315. case 2:
  316. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
  317. break;
  318. #endif
  319. #ifdef CONFIG_SYS_I2C_BASE3
  320. case 3:
  321. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
  322. break;
  323. #endif
  324. #ifdef CONFIG_SYS_I2C_BASE4
  325. case 4:
  326. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
  327. break;
  328. #endif
  329. #ifdef CONFIG_SYS_I2C_BASE5
  330. case 5:
  331. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
  332. break;
  333. #endif
  334. #ifdef CONFIG_SYS_I2C_BASE6
  335. case 6:
  336. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
  337. break;
  338. #endif
  339. #ifdef CONFIG_SYS_I2C_BASE7
  340. case 7:
  341. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
  342. break;
  343. #endif
  344. #ifdef CONFIG_SYS_I2C_BASE8
  345. case 8:
  346. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
  347. break;
  348. #endif
  349. #ifdef CONFIG_SYS_I2C_BASE9
  350. case 9:
  351. i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
  352. break;
  353. #endif
  354. default:
  355. printf("Bad bus: %d\n", bus);
  356. return -1;
  357. }
  358. current_bus = bus;
  359. if (!bus_initialized[current_bus])
  360. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  361. return 0;
  362. }
  363. int i2c_get_bus_num(void)
  364. {
  365. return current_bus;
  366. }
  367. #endif